TI380PCI

PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

SPWS020 – AUGUST 1995

7

POST OFFICE BOX 1443

PIN

I/O‡

DESCRIPTION

NAME

NO.

I/O‡

DESCRIPTION

SIRQ

6

I

System interrupt request. TI380C2x drives SIRQ to signal an interrupt request to the host processor.

H = No interrupt request

L

= Interrupt request by TI380C2x

SAS

2

I/O

System memory address strobe. SAS is an active-low address strobe that is an output during DIO and

an input during DMA.§

H = Address not valid

L

= Address is valid and a transfer operation is in progress

SRNW

128

I/O

System read not write. SRNW serves as a control signal to indicate a read or write cycle.

H = Read Cycle

L

= Write Cycle

† The TI380PCI SIF pin names correspond to a subset of the system interface pins on a TI380C2x. Consult the TI380C2x data sheet for more

information on individual pins. Like-named pins on the TI380PCI and TI380C2x system interfaces are intended to be connected to each other.

‡ I = in, O = out

§ The signal connecting this pin to the TI380C2x also should be connected to a 4.7-kW pullup resistor.