SST48CF024 datasheet(37/60 Pages) SST

37 / 60 page

Data Sheet

CompactFlash Card

SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256

S71125-03-000

9/01

375

3.1.5.11 Card (Drive) Address Register (Address3F7H[377H]; Offset F)

This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not be

mapped into the host’s I/O space because of potential conflicts on Bit 7. The bits are defined as follows:

Bit 7

This bit is don’t care.

Implementation Note:

Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk

Controller operating at the same addresses as the CompactFlash card. Following are

some possible solutions to this problem for the PCMCIA implementation:

1. Locate the CompactFlash card at a non-conflicting address, i.e. Secondary address

(377) or in an independently decoded Address Space when a Floppy Disk Controller is

located at the Primary addresses.

2. Do not install a Floppy and a CompactFlash card in the system at the same time.

3. Implement a socket adapter which can be programmed to (conditionally) tri-state D7

of I/0 address 3F7H/377H when a CompactFlash card is installed and conversely to tri-

state D6- D0 of I/O address 3F7H/377H when a floppy controller is installed.

4. Do not use the CompactFlash Card’s Drive Address register. This may be accom-

plished by either a) If possible, program the host adapter to enable only I/O addresses

1F0H-1F7H, 3F6H (or 170H-177H, 176H) to the CompactFlash card or b) if provided use

an additional Primary/Secondary configuration in the CompactFlash card which does not

respond to accesses to I/O locations 3F7H and 377H. With either of these implementa-

tions, the host software must not attempt to use information in the Drive Address Register.

Bit 6 (-WTG) This bit is 0 when a write operation is in progress, otherwise, it is 1.

Bit 5 (-HS3)

This bit is the negation of bit 3 in the Drive/Head register.

Bit 4 (-HS2)

This bit is the negation of bit 2 in the Drive/Head register.

Bit 3 (-HS1)

This bit is the negation of bit 1 in the Drive/Head register.

Bit 2 (-HS0)

This bit is the negation of bit 0 in the Drive/Head register.

Bit 1 (-nDS1) This bit is 0 when drive 1 is active and selected.

Bit 0 (-nDS0) This bit is 0 when the drive 0 is active and selected.

3.2 CF-ATA Command Description

This section defines the software requirements and the format of the commands the host sends to the Compact-

Flash cards. Commands are issued to the CompactFlash card by loading the required registers in the command

block with the supplied parameters, and then writing the command code to the Command Register. The manner in

which a command is accepted varies. There are three classes (see Table 3-6) of command acceptance, all depen-

dent on the host not issuing commands unless the CompactFlash card is not busy (BSY=0).

3.2.1 CF-ATA Command Set

Table 3-6 summarizes the CF-ATA command set with the paragraphs that follow describing the individual com-

mands and the task file for each.

-WTG

-HS3

-HS2

-HS1

-HS0

-nDS1

-nDS0

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