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TM4EP72CJB Datasheet(PDF) 1 Page - Texas Instruments

Part # TM4EP72CJB
Description  EXTENDED-DATA-OUT BUFFERED DYNAMIC RAM MODULES
PDF  13 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TM4EP72CJB Datasheet(HTML) 1 Page - Texas Instruments

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TM4EP72BPB, TM4EP72BJB, 4194304 BY 72BIT
TM4EP72CPB, TM4EP72CJB 4194304 BY 72BIT
EXTENDEDDATAOUT BUFFERED DYNAMIC RAM MODULES
SMMS686A − AUGUST 1997 − REVISED FEBRUARY 1998
1
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
D Organization ...4194304 × 72 Bits
D Single 3.3-V Power Supply
(
±10% Tolerance)
D JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) With Buffer for Use With
Socket
D TM4EP72xxB-xx — Uses Eighteen 16M-Bit
High-Speed (4M
×4-Bit) Dynamic Random
Access Memories (DRAMs)
D High-Speed, Low-Noise LVTTL Interface
D High-Reliability Plastic 26-Lead
300-Mil-Wide Surface-Mount Small-Outline
J-Lead (SOJ) Package (DJ Suffix) and
26-Lead 300-Mil-Wide Surface-Mount Thin
Small-Outline Package (TSOP) (DGA Suffix)
D Intended for Workstation/Server
Applications
D Long Refresh Periods:
− TM4EP72CxB: 64 ms (4 096 Cycles)
− TM4EP72BxB: 32 ms (2 048 Cycles)
D 3-State Output
D Extended-Data-Out (EDO) Operation With
CAS-Before-RAS (CBR), RAS-Only, and
Hidden Refresh
D Ambient Temperature Range
0
°C to 70°C
D Gold-Plated Contacts
D Performance Ranges
ACCESS
ACCESS ACCESS
EDO
TIME
TIME
TIME
CYCLE
tRAC
tCAC
tAA
tHPC
(MAX)
(MAX)
(MAX)
(MIN)
’4EP72xxB-50
50 ns
13 ns
25 ns
20 ns
’4EP72xxB-60
60 ns
15 ns
30 ns
25 ns
’4EP72xxB-70
70 ns
18 ns
35 ns
30 ns
description
The TM4EP72BxB is a 32M-byte, 168-pin, buffered, dual-in-line memory module (DIMM). The DIMM is
composed of eighteen TMS427409A, 4 194 304
× 4-bit 2K refresh EDO DRAMs, each in a 300-mil, 26-lead
plastic TSOP (DGA suffix) or SOJ package (DJ suffix), and two SN74LVT162244 16-bit buffers, each in a
48-lead plastic TSOP mounted on a substrate with decoupling capacitors. See the TMS427409A data sheet
(literature number SMKS893).
The TM4EP72CxB is a 32M-byte, 168-pin, buffered DIMM. The DIMM is composed of eighteen TMS426409A,
4 194 304
× 4-bit 4K refresh EDO DRAMs, each in a 300-mil, 26-lead plastic TSOP (DGA suffix) or SOJ package
(DJ suffix), and two 16-bit buffers mounted on a substrate with decoupling capacitors. See the TMS427409A
data sheet (literature number SMKS893).
These modules are intended for multimodule workstation / server applications where buffering is needed for
address and control signals. Two copies of address 0 (A0 and B0) are defined to allow maximum performance
for 4-byte applications which interleave between two 4-byte banks. A0 is common to the DRAMs used for
DQ0−DQ31, while B0 is common to the DRAMs used for DQ32−DQ63.
operation
The TM4EP72xxB operates as eighteen TMS42x409As that are connected as shown in the TM4EP72xxB
functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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