Preliminary Technical Data

WM3100

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PTD, October 2010, Rev 2.0

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CHARGE PUMP

The WM3100 incorporates a charge pump circuit, which generates the negative supply rail for the

line output drivers. The charge pump is powered from VDD, and generates the negative supply

CPVOUTN. The switching clock for the charge pump is generated internally.

The external connections for the charge pump are illustrated in Figure 5. A fly-back capacitor is

connected between the CPCA and CPCB pins. A de-coupling capacitor is required on CPVOUTN.

Note that an input decoupling capacitor is also recommended on the VDD pin.

Figure 5 External Connections for Charge Pump

DIGITAL CONTROL INPUTS

The WM3100 supports two digital control inputs, as described below.

The OUTMODE pin selects between normal operation and high-impedance mute state. A logic ‘1’

input selects the high-impedance state, in which the outputs are muted and un-driven. This mode

enables the external connectors to support other functions without interference from the WM3100

drivers. A logic ‘0’ input selects normal operation.

The MUTE

¯¯¯¯¯ pin selects between normal operation and muted output mode. This is an “active low”

input pin. A logic ‘0’ input enables the mute function. A logic ‘1’ input selects normal operation.

Note that the MUTE

¯¯¯¯¯ pin has no function when the OUTMODE pin is asserted.

The digital control inputs are summarised in Table 1.

INPUT

DESCRIPTION

OUTMODE

Output mode control pin

0 = Normal operation

1 = High impedance mute state

MUTE

¯¯¯¯¯

Mute control (only valid when OUTMODE = 0)

0 = Output muted

1 = Normal operation

Table 1 Digital Control Inputs