ICX082AL datasheet(4/16 Pages) SONY

4 / 16 page

– 4 –

ICX082AL

∗2 Indications of substrate voltage (V

SUB

) and reset gate clock voltage (VRGL) setting value

The setting value of the substrate voltage and reset gate clock voltage are indicated on the back of the

image sensor by a special code. Adjust the substrate voltage (VSUB) and reset gate clock voltage (VRGL) to

the indicated voltage. The adjustment precision is ±3%.

VSUB code — one character indication

VRGL code — one character indication

↑

VRGL code

VSUB code

"Code" and optimal setting correspond to each other as follows.

DC Characteristics

<Example> "5K"

→ VRGL = 2.0V

VSUB = 12.0V

∗3 This must no exceed the V

voltage of the vertical clock waveform.

∗4 1) Current to each pin when 20V is applied to V

, RD, VOUT, VSS, HIS and SUB pins, while pins that are

not tested are grounded.

2) Current to each pin when 20V is applied sequentially to V

φ1, Vφ2, Vφ3 and Vφ4 pins, while pins that are

not tested are grounded. However, 20V is applied to SUB pin.

3) Current to each pin when 15V is applied sequentially to H

φ1, Hφ2, RG and VGG pins, while pins that are

not tested are grounded. However, 15V is applied to SUB pin.

4) Current to VL pin when 30V is applied to V

φ1, Vφ3, HIS, VDD, RD and VOUT pins or when, 24V is applied

to RG pin or when, 20V is applied to V

φ2, Vφ4, VGG, VSS, Hφ1 and Hφ2 pins, while VL pin is grounded.

However, GND and SUB pins are left open.

∗5 Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.

Item

Output amplifier drain current

Input current

IDD

IIN1

IIN2

µA

∗4

∗5

Symbol

Min.

Typ.

Max.

Unit

Remarks

VRGL code

Optimal setting

0.5 1.0 1.5 2.0 2.5 3.0

VSUB code

Optimal setting 9.0 9.5 10.010.511.011.512.0

12.513.013.514.014.515.015.516.016.517.017.518.018.519.0

ICX082AL Datasheet(PDF) 4 Page - Sony Corporation

ICX082AL Datasheet(HTML) 4 Page - Sony Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL