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LCX019AM

2. LCD panel operations

[Description of basic operations]

The basic operations of the LCD panel are shown below based on the wide-display mode.

• A vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse

to every 480 gate lines sequentially in every horizontal scanning period.

• A horizontal driver, which consists of horizontal shift registers, gates and CMOS sample-and-hold circuits,

applies selected pulses to every 1199.5 signal electrodes sequentially in a single horizontal scanning period.

• Vertical and horizontal shift registers address one pixel, and then turn on Thin Film Transistors (TFTs; two

TFTs) to apply a video signal to the dot. The same procedures lead to the entire 480

× 1199.5 dots to display

a picture in a single vertical scanning period.

• The LCD pixel dots are arranged in a delta pattern, where the dots connected to the identical signal line is

positioned with 1.5-dot offset against an adjacent horizontal line. Horizontal Start Pulse (HST) is generated

with 1.5-bit offset between the horizontal lines to regulate the above offset. HCK and sample-and-hold (S/H)

pulses follow the same 1.5-bit offset scheme.

• The video signal shall be input with polarity-inverted system in every horizontal cycle.

• Timing diagrams of the vertical and the horizontal display cycle are shown below:

Vertical display cycle 480H

1

2

480

(1) Vertical display cycle

VST

VCK

(2) Horizontal display cycle

Horizontal display cycle

1

2

3

4

5

6

200

201

HST

HCK1

HCK2