AD1819B

–22–

REV. 0

TAG Phase Bit Assignments:

Bit (15)

Codec Ready

Bit (14)

Slot 1 Valid

Bit (13)

Slot 2 Valid

Bit (12)

Slot 3 Valid/ADC Left Data Is Valid on Slot 3

Bit (11)

Slot 4 Valid/ADC Right Data Is Valid on Slot 4

Bit (10)

Slot 5 Valid/ADC Left Data Slave 1 Valid on Slot 5

Bit (9)

Slot 6 Valid/ADC Right Data Slave 1 Valid on Slot 6

Bit (8)

Slot 7 Valid/ADC Left Data Slave 2 Valid on Slot 7

Bit (7)

Slot 8 Valid/ADC Right Data Slave 2 Valid on Slot 8

Bit (6:0)

Not Used

Slot 1: Status Address Port

The status port is used to monitor status for AD1819B functions including, but not limited to, mixer settings and power

management.

Audio input frame Slot 1’s stream echoes the control register index, for historical reference, for the data to be returned in Slot 2

(assuming that Slots 1 and 2 had been tagged “valid” by the AD1819B during Slot 0).

Status Address Port Bit Assignments:

Bit (19)

RESERVED

(Stuffed with 0)

Bit (18:12)

Control Register Index

(Echo of Register Index for Which Data Is Being Returned)

Bit (11)

DAC Request Slot 3

(0 = Request, 1 = No Request)

Bit (10)

DAC Request Slot 4

(0 = Request, 1 = No Request)

Bit (9)

DAC Request Slot 5

(0 = Request, 1 = No Request); Slave 1

Bit (8)

DAC Request Slot 6

(0 = Request, 1 = No Request); Slave 1

Bit (7)

DAC Request Slot 7

(0 = Request, 1 = No Request); Slave 2

Bit (6)

DAC Request Slot 8

(0 = Request, 1 = No Request); Slave 2

Bit (5:0)

RESERVED

(Stuffed with 0s)

The first bit (MSB) generated by the AD1819B is always stuffed with a 0. The following 7-bit positions communicate the associated

control register address, and the trailing 12-bit positions are stuffed with 0s by the AD1819B.

Slot 2: Status Data Port

The status data port delivers 16-bit control register read data.

Bit (19:4)

Control Register Read Data

(Stuffed with 0s If Tagged “Invalid” by AD1819B)

Bit (3:0)

RESERVED

(Stuffed with 0s)

If Slot 2 is tagged “invalid” by the AD1819B, the entire slot will be stuffed with 0s by the AD1819B.

Slot 3: PCM Record Left Channel

Audio input frame Slot 3 is the left channel output of the AD1819B’s input MUX, post-ADC.

AD1819B transmits its ADC output data (MSB first), and stuffs the trailing nonvalid bit positions with 0s to fill out its 20-bit time slot.

Slot 4: PCM Record Right Channel

Audio input frame Slot 4 is the right channel output of the AD1819B’s input MUX, post-ADC.

AD1819B transmits its ADC output data (MSB first), and stuffs the trailing nonvalid bit positions with 0s to fill out its 20-bit time slot.

Slot 5–Slot 8: Multicodec Communication

• Slot 5 Slave 1 PCM Record Left Channel

• Slot 6 Slave 1 PCM Record Right Channel

• Slot 7 Slave 2 PCM Record Left Channel

• Slot 8 Slave 2 PCM Record Right Channel

Slot 9–Slot 12: Reserved

Audio input frame Slots 9–12 are reserved for future use and are always stuffed with 0s by the AD1819B.

AC-Link Low Power Mode

The AC-Link signals can be placed in a low power mode. When the AD1819B’s Power-Down Register (26h) is programmed to the

appropriate value, both BIT_CLK and SDATA_IN will be brought to a logic low voltage level.