AD1868

REV. A

–4–

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

12

13

14

15

11

16

LL

DL

CK

DR

LR

DGND

NRL

AGND

NRR

AD1868

TOP VIEW

(Not To Scale)

DEFINITION OF SPECIFICATIONS

Total Harmonic Distortion + Noise

Total harmonic distortion plus noise (THD+N) is defined as

the ratio of the square root of the sum of the squares of the am-

plitudes of the harmonics and noise to the amplitude of the fun-

damental input frequency. It is usually expressed in percent (%)

or decibels (dB).

D-Range Distortion

D-range distortion is the ratio of the amplitude of the signal at

an amplitude of –60 dB to the amplitude of the distortion plus

noise. In this case, an A-weight filter is used. The value speci-

fied for D-range performance is the ratio measured plus 60 dB.

Signal-to-Noise Ratio

The signal-to-noise ratio is defined as the ratio of the amplitude

of the output when a full-scale output is present to the ampli-

tude of the output with no signal present. It is expressed in

decibels (dB) and measured using an A-weight filter.

Gain Linearity

Gain linearity is a measure of the deviation of the actual output

amplitude from the ideal output amplitude. It is determined by

measuring the amplitude of the output signal as the amplitude

of that output signal is digitally reduced to a lower level. A per-

fect D/A converter exhibits no difference between the ideal and

actual amplitudes. Gain linearity is expressed in decibels (dB).

Midscale Error

Midscale error is the difference between the analog output and

the bias when the twos complement input code representing

midscale is loaded in the input register. Midscale error is ex-

pressed in mV.

ORDERING GUIDE

THD + N

Package

Model

SNR

Option*

AD1868N

0.008%

95 dB

N-16

AD1868R

0.008%

95 dB

R-16

AD1868N-J

0.006%

95 dB

N-16

AD1868R-J

0.006%

95 dB

R-16

*N = Plastic DIP; R = SOIC.

PIN DESIGNATIONS

Digital Supply (+5 Volts)

LL

Left Channel Latch Enable

DL

Left Channel Data Input

CK

Clock Input

DR

Right Channel Data Input

LR

Right Channel Latch Enable

DGND

Digital Common

Right Channel Bias

Analog Supply (+5 Volts)

10

Right Channel Output

11

NRR

Right Channel Noise Reduction

12

AGND

Analog Common

13

NRL

Left Channel Noise Reduction

14

Left Channel Output

15

Analog Supply (+5 Volts)

16

Left Channel Bias

FUNCTIONAL DESCRIPTION

The AD1868 is a complete, voltage output dual 18-bit digital

audio DAC which operates with a single +5 volt supply. As

shown in the block diagram, each channel contains a voltage

reference, an 18-bit DAC, an output amplifier, an 18-bit input

latch, and an 18-bit serial-to-parallel input register.

The voltage reference section provides a reference voltage and a

false ground voltage for each channel. The low noise bandgap

circuits produce reference voltages that are unaffected by

changes in temperature, time, and power supply.

The output amplifier uses both MOS and bipolar devices and

incorporates an NPN class-A output stage. It is designed to pro-

duce high slew rate, low noise, low distortion, and optimal fre-

quency response.

Each 18-bit DAC uses a combination of segmented decoder

and R-2R architecture to achieve good integral and differential

linearity. The resistors which form the ladder structure are fab-

ricated with silicon-chromium thin film. Laser trimming of

these resistors further reduces linearity error, resulting in low

output distortion.

The input registers are fabricated with CMOS logic gates.

These gates allow fast switching speeds and low power con-

sumption, contributing to the fast digital timing, low glitch, and

low power dissipation of the AD1868.