FUNCTIONAL BLOCK DIAGRAM

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

LRCK

BCK

S0

DV

DD

64/32

DGND

NC

AV

SS

1

AV

SS

2

AGND

APD

VINR–

VINR+

REFR

WCK

DATA

CLOCK

S1

DGND

DV

DD

AV

SS

1

AV

DD

2

AV

DD

1

AGND

VINL–

VINL+

REFL

VOLTAGE

REFERENCE

SERIAL OUTPUT

INTERFACE

SINGLE-STAGE,

4k-TAP

FIR DECIMATION

FILTER

D

A

C

DIGITAL

CHIP

ANALOG

CHIP

RESET

SINGLE-STAGE,

4k-TAP

FIR DECIMATION

FILTER

D

A

C

D

A

C

D

A

C

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

a

High Performance

16-/18-Bit

Stereo ADCs

AD1878/AD1879*

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 617/329-4700

Fax: 617/326-8703

FEATURES

Fully Differential Dual Channel Analog Inputs

103 dB Signal-to-Noise (AD1879 typ)

–98 dB THD+N (AD1879 typ)

0.001 dB Passband Ripple and 115 dB Stopband

Attenuation

Fifth-Order, 64 Times Oversampling

Modulator

Single Stage, Linear Phase Decimator

256

APPLICATIONS

Digital Tape Recorders

Professional, DCC, and DAT

A/V Digital Amplifiers

CD-R

Sound Reinforcement

PRODUCT OVERVIEW

The AD1879 is a two-channel, 18-bit oversampling ADC based

on

∑∆ technology and intended primarily for digital audio appli-

cations. The AD1878 is identical to the 18-bit AD1879 except

that it outputs 16-bit data words. Statements in this data sheet

should be read as applying to both parts unless otherwise noted.

Each input channel of these ADCs is fully differential. Each

data conversion channel consists of a fifth order one-bit noise

shaping modulator and a digital decimation filter. An on-chip

voltage reference provides a voltage source to both channels sta-

ble over temperature and time. Digital output data from both

channels is time-multiplexed to a single, flexible serial interface.

The AD1878/AD1879 accepts a 256

× F

Input signals are sampled at 64

× F

eliminating external sample-and-hold amplifiers and minimizing

the requirements for antialias filtering at the input. With simpli-

fied antialiasing, linear phase can be preserved across the passband.

The AD1878/AD1879’s proprietary fifth-order differential

switched-capacitor modulator architecture shapes the one-bit

comparator’s quantization noise out of the audio passband. The

high order of the modulator randomizes the modulator output,

reducing idle tones in the AD1878/AD1879 to very low levels.

The AD1878/AD1879’s differential architecture provides in-

creased dynamic range and excellent common-mode rejection

characteristics. Because its modulator is single-bit, AD1878/

AD1879 is inherently monotonic and has no mechanism for

producing differential linearity errors.

The digital decimation filters are single-stage, 4095-tap finite

impulse response filters for filtering the modulator’s high fre-

quency quantization noise and reducing the 64

× F

*

Protected by U.S. Patent Numbers 5055843, 5126653, and others pending.

phase and a narrow transition band that permits the digitization

of 20 kHz signals while preventing aliasing into the passband

even when using a 44.1 kHz sampling frequency. Passband

ripple is less the 0.001 dB, and stopband attenuation exceeds

115 dB.

The flexible serial output port produces data in twos-complement,

MSB-first format. Input and output signals are to TTL and

CMOS-compatible logic levels. The port is configured by pin

selections. The AD1878/AD1879 can operate in either master

or slave mode. Each 16-/18-bit output word of a stereo pair can

be formatted within a 32-bit field as either right-justified, I

compatible, or at user-selected positions. The output can also be

truncated to 16-bits by formatting into a 16-bit field.

The AD1878/AD1879 consists of two integrated circuits in a

single ceramic 28-pin DIP package. The modulators and refer-

ence are fabricated in a BiCMOS process; the decimator and

output port, in a 1.0

µm CMOS process. Separating these func-

tions reduces digital crosstalk to the analog circuitry. Analog and

digital supply connections are separated to further isolate the

analog circuitry from the digital supplies.

The AD1878/AD1879 operates from

±5 V power supplies over

the temperature range of –25

°C to +70°C.