AD5235 datasheet(4/10 Pages) AD

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PRELIMINARY TECHNICAL DATA

Nonvolatile Memory Digital Potentiometers

AD5235

REV PrD 6 NOV, 2000

Information contained in this Product Concept data sheet describes a product in the early definition stage. There is no guarantee that the

information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara,

CA. TEL(408)562-7254; FAX (408)727-1550; walt.heinzer@analog.com

Absolute Maximum Rating (TA = +25°C, unless otherwise

noted)

VDD to GND..............................................................-0.3, +7V

VSS to GND ................................................................. 0V, -7V

VDD to VSS ......................................................................... +7V

VA, VB, VW to GND ................................................. VSS, VDD

AX – BX, AX – WX, BX – WX ...................................... ±20mA

Ox to GND...................................................................0V, VDD

Digital Inputs & Output Voltage to GND .................. 0V, +7V

Operating Temperature Range......................... -40°C to +85°C

Maximum Junction Temperature (TJ MAX)...................+150°C

Storage Temperature ..................................... -65°C to +150°C

Lead Temperature (Soldering, 10 sec)..........................+300°C

Thermal Resistance

JA,

TSSOP-16...................................................... 180°C/W

Package Power Dissipation = (TJMAX - TA) / θJA

Ordering Guide

#CHs/

Temp

Package

Model

k Ohm

Range

Description Option

AD5235BRU25

X2/25

-40/+85°C TSSOP-16

RU-16

AD5235BRU250 X2/250

-40/+85°C TSSOP-16

RU-16

The AD5235 contains 16,000 transistors.

Die size: 100 x 105 mil = 10,500 sq. mil

AD5235 PIN CONFIGURATION

CLK

SDI

SDO

GND

VSS

RDY

VDD

AD5235 PIN FUNCTION DESCRIPTION

Name

Description

CLK

Serial Input Register clock pin. Shifts in one bit at

a time on positive clock edges.

SDI

Serial Data Input Pin. Shifts in one bit at a time

on positive clock CLK edges.

SDO

Serial Data Output Pin. Open Drain Output

requires external pull-up resistor. Commands 9

and 10 activate the SDO output. See Instruction

operation Truth Table. Table 2.

GND

Ground pin, logic ground reference

VSS

Negative Supply. Connect to zero volts for single

supply applications.

A terminal of RDAC1.

Wiper terminal of RDAC1,

ADDR(RDAC1) = 0H.

B terminal of RDAC1.

B terminal of RDAC2.

Wiper terminal of RDAC2,

ADDR(RDAC3) = 1H.

A terminal of RDAC2.

VDD

Positive Power Supply Pin. Should be

≥ the

input-logic HIGH voltage.

Write Protect Pin. Prevents any changes to the

present EEMEM contents when active low.

Hardware over ride preset pin. Refreshes the

scratch pad register with current contents of the

EEMEM register. Factory default loads midscale

51210.

Serial Register chip select active low. Serial

CS returns to

logic high.

RDY

Ready. Active-high open drain output. Identifies

completion of commands 2, 3, 8, 9, 10.

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