PCAL9555APW datasheet(3/46 Pages) NXP

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PCAL9555A

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Product data sheet

Rev. 1 — 3 October 2012

3 of 46

NXP Semiconductors

PCAL9555A

Low-voltage 16-bit GPIO with Agile I/O, interrupt and weak pull-up

Ordering information

3.1 Ordering options

Block diagram

Table 1.

Ordering information

Type number

Topside mark Package

Name

Description

Version

PCAL9555AHF

L55A

HWQFN24

plastic thermal enhanced very very thin quad flat package;

no leads; 24 terminals; body 4

 4  0.75 mm

SOT994-1

PCAL9555APW

PCAL9555A

TSSOP24

plastic thin shrink small outline package; 24 leads;

body width 4.4 mm

SOT355-1

Table 2.

Ordering options

Type number

Orderable

part number

Package

Packing method

Minimum

order quantity

Temperature range

PCAL9555AHF

PCAL9555AHF,128

HWQFN24

Reel pack, SMD,

13-inch, Turned

6000

Tamb = 40 C to +85 C

PCAL9555APW

PCAL9555APW,118

TSSOP24

Reel pack, SMD,

13-inch

2500

Tamb = 40 C to +85 C

Remark: All I/Os are set to inputs at reset.

Fig 1.

Block diagram of PCAL9555A

PCAL9555A

POWER-ON

RESET

002aah257

I2C-BUS/SMBus

CONTROL

INPUT

FILTER

SCL

SDA

VDD

INPUT/

OUTPUT

PORTS

P0_0

VSS

8-bit

write pulse

read pulse

P0_2

P0_1

P0_3

P0_4

P0_5

P0_6

P0_7

INPUT/

OUTPUT

PORTS

P1_0

8-bit

write pulse

read pulse

P1_2

P1_1

P1_3

P1_4

P1_5

P1_6

P1_7

FILTER

VDD

INT

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