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AD7709 Datasheet(PDF) 10 Page - Analog Devices |
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AD7709 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 17 page ![]() AD7709 –10– REV. PrA January 2001 PRELIMINARY TECHNICAL DATA ADC CIRCUIT INFORMATION Overview The AD7709 incorporates an analog multiplexer with a Sigma-Delta ADC, on-chip programmable gain amplifier and digital filtering intended for the measurement of wide dynamic range, low frequency signals such as those in weigh-scale, strain-gauge, pressure transducer or temperature measurement applications. The AD7709 offers 16-bit resolution. The AD7709 can be configured as 2 fully differential input channels or as 4 pseudo differential input channels referenced to AINCOM. The channel is buffered and can be programmed for one of 8 input ranges from +20mV to +2.56V. Buffering the input channel means that the part can handle significant source impedances on the analog input and that R, C filtering (for noise rejection or RFI reduction) can be placed on the analog inputs if required. These input channels are intended to convert signals directly from sensors without the need for external signal conditioning. Other functions contained on-chip that augment the operation of the ADC include software configurable current sources, switchable reference inputs and low side power switches. The ADC employs a sigma-delta conversion technique to realize up to 16-bits of no missing codes performance. The sigma-delta modulator converts the sampled input signal into a digital pulse train whose duty cycle contains the digital information. A Sinc 3 programmable low pass filter is then employed to decimate the modulator output data stream to give a valid data conversion result at programmable output rates from 5.35Hz (186.77mS) to 105.03Hz (9.52mS). A Chopping scheme is also employed to minimize ADC channel offset errors. A block diagram of the ADC input channel is shown in Figure 3 below. 1 8 SF × 3 Digital Output Sinc 3 Filter A in + V os A in os chop adc 1 2 --- SF) × × XOR - V ∑ ∑ () ff (8 3 S-D Analog Input Buffer PGA f chop fin f mod Mux M OD0 Figure 3. AD7709 ADC Channel Block Diagram |
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