AD7709

–16–

REV. PrA

January 2001

PRELIMINARY TECHNICAL DATA

CONFIG2

RN2

Used in conjunction with RN1 and RN0 to select the analog input range.

CONFIG1

RN1

Used in conjunction with RN2 and RN0 to select the analog input range.

CONFIG0

RN0

Used in conjunction with RN2 and RN1 to select the analog input range.

RN2

RN1

RN0

Selected Main ADC Input Range (Vref=2.5V)

0

0

0

±20mV

0

0

1

±40mV

0

1

0

±80mV

0

1

1

±160mV

1

0

0

±320mV

1

0

1

±640mV

1

1

0

±1.28V

1

1

1

±2.56V

Filter Register:(A1,A0=1,0; Power-On-Reset = 00Hex)

The Filter Register is an 8-bit register from which data can either be read or to which data can be written. This register

determines the amount of averaging performed by the sinc filter. Table VII outlines the bit designations for the Filter

Register. FR7 through FR0 indicate the bit location, FR denoting the bits are in the Filter Register. FR7 denotes the

first bit of the data stream. The number in brackets indicates the power-on/reset default status of that bit. The number in

this register is used to set the decimation factor and thus the output update rate for the ADCs. The filter register cannot

be written to by the user while the ADC is active. The update rate is used for the ADC is calculated as follows :

X

1

X

3

8.SF

Where :

fadc =

ADC Output Update Rate

fmod =

Modulator Clock Frequency= 32.768KHz (Main and Aux ADC)

SF =

Decimal Value written to SF Register

FR7

FR6

FR5

FR4

FR3

FR2

FR1

FR0

SF7(0)

SF6(1)

SF5(0)

SF4(0)

SF3(0)

SF2(1)

SF1(0)

SF0(1)

Table VII. Filter Register Bit Designations

errors. This means that the time for a single conversion or the time to the first conversion result is

Table XII. Update Rate Vs SF Word.

ADC Data Result Register (DATA):(A1,A0=1,1; Power-On-Reset = 000000Hex)

The conversion result for the selected ADC channel is stored in the ADC data register (DATA). This register is 16-bits

wide. This is a read only register. On completion of a read from this register the RDY bit in the status register is cleared.

SF(dec)

SF(hex)

13

0D

105.3

9.52

69

45

19.79

50.34

255

FF

5.35

186.77