AD8401

–11–

REV. 0

Table III. DAC Unipolar Code

Nominal

Analog

DAC Register Contents

General Transfer

Decimal

Binary

Equation

255

1111 1111

2.500

×

255

256

2.490 V

129

1000 0001

2.500

×

129

256

1.260 V

128

1000 0000

2.500

×

128

256

1.250 V

127

0111 1111

2.500

×

127

256

1.240 V

1

0000 0001

2.500

×

1

256

0.010 V

0

0000 0000

2.500

×

0

256

0.000 V

APPLICATIONS INFORMATION

The software programming needs to format data as defined by

the transfer equations and Code Tables that follow.

DAC Transfer Equation

D

256

= 2.500 ×

255

256

for a 2.50 V full scale

where D is the decimal value 0 through 255 of the 8-bit data

word.

The nominal output voltages listed in the Code Table are sub-

ject to the static performance specifications. The INL, Zero-

Scale and Full-Scale errors describe the total specified variation

that will be encountered from part to part. One LSB of error for

the 2.5 V FS range is 9.766 millivolts (= 2.50/256).

Although separate AGNDs exist for both the DAC and ADC to

minimize crosstalk, writing data to the DAC while the ADC is

performing a conversion may result in an incorrect conversion

from the ADC due to signal interaction between the DAC and

ADC. Therefore, to ensure correct operation of the ADC, the

DAC register should not be updated while the ADC is converting.

The AD8401 is configured for an input range of +3.0 volts Full

Scale. The nominal transfer characteristic for this range is plot-

ted in Figure 23. The output coding is natural binary with one

LSB equal to 11.72 millivolts. Note that the first code transition

between 0 LSB and 1 LSB occurs at 5.8 mV, one half of the

11.72 mV LSB step size. The last code transition occurs at Full

Scale minus 1.5 LSBs, which is a 2.982 V input.

The AD8401 is easily interfaced to most microprocessors by us-

ing either address bits or address decode to select the appropri-

ate multiplexer channel. Figure 24 shows how easily the AD8401

interfaces to the AD899. No additional hardware is required.

OUTPUT

CODE

FULL SCALE

TRANSITION

123

FS

FS – 1LSB

1LSB = FS

256

11111111

11111110

11111101

00000011

00000010

00000001

00000000

Figure 23. ADC 0 V to +3 V Input Transfer Characteristic