AD8517 datasheet(9/12 Pages) AD

9 / 12 page

AD8517/AD8527

–9–

REV. B

Q14

VEE

VCC

VOUT

ESD

Q11

Q13

R10

R11

Q15

Q17

R12

Q18

R14

Q19

Q20

VCC

D16

R13

VEE

Q10

Figure 19. Simplified Schematic

Table I. Typical Battery Life Voltage Range

Nominal

End of Voltage

Battery

Voltage (V)

Discharge (V)

Lead-Acid

1.8

Lithium

2.6-3.6

1.7-2.4

NiMH

1.2

NiCd

1.2

Carbon-Zinc

1.5

1.1

RAIL-TO-RAIL INPUT AND OUTPUT

The AD8517 features an extraordinary rail-to-rail input and

output with supply voltages as low as 1.8 V. With the amplifier’s

supply range set to 1.8 V, the input can be set to 1.8 V p-p,

allowing the output to swing to both rails without clipping. Figure

20 shows a scope picture of both input and output taken at unity

gain, with a frequency of 1 kHz, at VS = 1.8 V and VIN = 1.8 V p-p.

TIME – 200 s/Div

VS = 0.9V

VIN = 1.8 V p-p

VIN

VOUT

Figure 20. Rail-to-Rail Input Output

The rail-to-rail feature of the AD8517 can be observed over the

supply voltage range, 1.8 V to 5 V. Traces are shown offset for

clarity.

INPUT BIAS CONSIDERATION

The input bias current (IB) is a nonideal, real-life parameter that

affects all op amps. IB can generate a somewhat significant offset

voltage. This offset voltage is created by IB when flowing through

the negative feedback resistor RF. If IB is 500 nA (worst case),

and RF is 100 k

Ω, the corresponding generated offset voltage is

50 mV (VOS = IB

RF).

Obviously the lower RF the lower the generated voltage offset.

Using a compensation resistor, RB, as shown in Figure 21, can

significantly minimize this effect. With the input bias current mini-

mized, we still need to be aware of the input offset current (IOS)

which will generate a slight offset error. Figure 21 shows three

different configurations to minimize IB-induced offset errors.

NONINVERTING CONFIGURATION

RB = RI RF

VOUT

AD8517

UNITY GAIN BUFFER

VOUT

RF = RS

AD8517

VOUT

RB = RI RF

INVERTING CONFIGURATION

AD8517

Figure 21. Input Bias Cancellation Circuits

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