AD9244 datasheet(19/36 Pages) AD

19 / 36 page

REV. A

AD9244

–19–

DIGITAL INPUTS AND OUTPUTS

Digital Outputs

Table III details the relationship among the ADC input, OTR,

and digital output format.

Data Format Select (DFS)

The AD9244 may be programmed for straight binary or twos

complement data on the digital outputs. Connect the DFS pin to

AGND for straight binary and to AVDD for twos complement.

Digital Output Driver Considerations

The AD9244 output drivers can be configured to interface with

5 V or 3.3 V logic families by setting DRVDD to 5 V or 3.3 V,

respectively. The output drivers are sized to provide sufficient

output current to drive a wide variety of logic families. How-

ever, large drive currents tend to cause glitches on the supplies

and may affect converter performance. Applications requiring

the ADC to drive large capacitive loads or large fanouts may

require external buffers or latches.

Out-of-Range (OTR)

An out-of-range condition exists when the analog input voltage is

beyond the input range of the ADC. OTR is a digital output that

is updated along with the data output corresponding to the par-

ticular sampled input voltage. Thus, OTR has the same pipeline

latency as the digital data. OTR is low when the analog input

voltage is within the analog input range and high when the analog

input voltage exceeds the input range as shown in Figure 12.

OTR will remain high until the analog input returns to within the

input range and another conversion is completed. By logically

AND-ing OTR with the MSB and its complement, overrange

high or underrange low conditions can be detected. Table IV is a

truth table for the overrange/underrange range circuit in Figure 13,

which uses NAND gates. Systems requiring programmable gain

conditioning of the AD9244 can, after eight clock cycles, detect an

out-of-range condition, thus eliminating gain selection iterations.

Also, OTR can be used for digital offset and gain calibration.

1111 1111 1111

1111 1111 1110

0000 0000 0001

0000 0000 0000

OTR DATA OUTPUTS

OTR

+FS – 1 LSB

+FS – 1/2 LSB

+FS

–FS

–FS + 1/2 LSB

–FS – 1/2 LSB

Figure 12. OTR Relation to Input Voltage and Output Data

Table IV. Output Data Format

OTR

MSB

Analog Input Is

00Within Range

01Within Range

10Underrange

Overrange

MSB

OTR

MSB

OVER = 1

UNDER = 1

Figure 13. Overrange/Underrange Logic

Digital Output Enable Function (OEB)

The AD9244 has three-state ability. If the OEB pin is low, the

output data drivers are enabled. If the OEB pin is high, the

output data drivers are placed in a high impedance state. It is

not intended for rapid access to the data bus. Note that OEB is

referenced to the digital supplies (DRVDD) and should not

exceed that supply voltage.

Table III. Output Data Format

Twos

Binary

Complement

Input (V)

Condition (V)

Output Mode

Mode

OTR

VIN+ – VIN–

–VREF – 0.5 LSB

00 0000 0000 0000

10 0000 0000 0000

VIN+ – VIN–

= –VREF

00 0000 0000 0000

10 0000 0000 0000

VIN+ – VIN–

= 0

10 0000 0000 0000

00 0000 0000 0000

VIN+ – VIN–

= +VREF – 1.0 LSB

11 1111 1111 1111

01 1111 1111 1111

VIN+ – VIN–

> +VREF – 0.5 LSB

11 1111 1111 1111

01 1111 1111 1111

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