AD9244 datasheet(23/36 Pages) AD

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REV. A

AD9244

–23–

REFIN

10MHz

REFOUT

SIGNAL SYNTHESIZER

2.5MHz, 0.8V p-p

HP8644

CLK SYNTHESIZER

65MHz, 1V p-p

HP8644

2.5MHz

BAND-PASS FILTER

AVDD

GND

DUT

AVDD

GND

DUT

DVDD

AD9244

EVALUATION BOARD

OUTPUT

BUSS

INPUT

xFMR

S1/S5

INPUT

CLOCK

+–

–+

DSP

EQUIPMENT

CLOCK

DIVIDER

Figure 20. Evaluation Board Connections

Table VI. Reference Jumper Configuration

Reference

Voltage

Jumpers

Notes

Internal

2 V

JP8 Not Connected.

Internal

1 V

JP8 Not Connected.

Internal

1 V

≤ VREF ≤ 2 V

JP8 Not Connected. VREF = 1 + R1/R2.

External

1 V

≤ VREF ≤ 2 V

8, 22

Set VREF with R26.

Table VII. Clock Jumper Configuration

Input Connector

Jumpers

DUT Clock

Differential

11, 13

Single-Ended

12, 15

Data Capture Clock

Internal

Diff DUT Clock

9, 18A

SE DUT Clock

9, 18B

External

3 or 4

Table V. Analog Input Jumper Configuration

Input

Connector

Jumpers

Notes

Differential: Transformer

45, 46

R8, R28 Provide DC Bias. Optimal for 500 kHz+.

Differential: Amplifier

42, 43

Remove T1 or T4. Used for low input frequencies.

Single-Ended

5, 40, 41

Remove T1 or T4. JP5: connected for dc-coupled, not connected

for ac-coupling.

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