AD9740 datasheet(14/20 Pages) AD

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REV. 0

AD9740

–14–

full-scale current is directed toward that output. As a result, the

PSRR measurement in Figure 15 represents a worst-case condition

in which the digital inputs remain static and the full-scale output

current of 20 mA is directed to the DAC output being measured.

An example serves to illustrate the effect of supply noise on the

analog supply. Suppose a switching regulator with a switching

frequency of 250 kHz produces 10 mV of noise and, for simplicity

sake (i.e., ignore harmonics), all of this noise is concentrated at

250 kHz. To calculate how much of this undesired noise will

appear as current noise superimposed on the DAC’s full-scale

current, IOUTFS, one must determine the PSRR in dB using

Figure 15 at 250 kHz. To calculate the PSRR for a given RLOAD,

such that the units of PSRR are converted from A/V to V/V,

adjust the curve in Figure 15 by the scaling factor 20

× log(RLOAD).

For instance, if RLOAD is 50

Ω, the PSRR is reduced by 34 dB (i.e.,

PSRR of the DAC at 250 kHz which is 85 dB in Figure 15 becomes

51 dB VOUT/VIN).

Proper grounding and decoupling should be a primary objective

in any high-speed, high resolution system. The AD9740 features

separate analog and digital supply and ground pins to optimize

the management of analog and digital ground currents in a system.

In general, AVDD, the analog supply, should be decoupled to

ACOM, the analog common, as close to the chip as physically

possible. Similarly, DVDD, the digital supply, should be decoupled

to DCOM as close to the chip as physically possible.

For those applications that require a single 3.3 V supply for both

the analog and digital supplies, a clean analog supply may be

generated using the circuit shown in Figure 16. The circuit

consists of a differential LC filter with separate power supply

and return lines. Lower noise can be attained by using low ESR

type electrolytic and tantalum capacitors.

100 F

ELECT.

0.1 F

CER.

TTL/CMOS

LOGIC

CIRCUITS

3.3V

POWER SUPPLY

FERRITE

BEADS

AVDD

ACOM

10 F–22 F

TANT.

Figure 16. Differential LC Filter for Single 3.3 V Applications

EVALUATION BOARD

General Description

The TxDAC family evaluation board allows for easy set up and

testing of any TxDAC product in the 28-lead SOIC package.

Careful attention to layout and circuit design combined with a

prototyping area allow the user to evaluate the AD9740 easily

and effectively in any application where high resolution, high-speed

conversion is required.

This board allows the user the flexibility to operate the AD9740

in various configurations. Possible output configurations include

transformer coupled, resistor terminated, and single and differ-

ential outputs. The digital inputs are designed to be driven from

various word generators, with the on-board option to add a

resistor network for proper load termination. Provisions are also

made to operate the AD9740 with either the internal or external

reference or to exercise the power-down feature.

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