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AD9826 Datasheet(PDF) 15 Page - Analog Devices |
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AD9826 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 20 page ![]() AD9826 –15– REV. A MUX Configuration Register The MUX Configuration Register controls the sampling chan- nel order and the 2-Channel Mode configuration in the AD9826. Bits D8 and D3–D0 should always be set low. Bit D7 is used when operating in 3-Channel or 2-Channel Mode. Setting Bit D7 high will sequence the MUX to sample the Red channel first, then the Green channel, and then the Blue channel. When in 3-channel mode, the CDSCLK2 pulse always resets the MUX to sample the Red channel first (see Figure 11). When Bit D7 is set low, the channel order is reversed to Blue first, Green sec- ond, and Red third. The CDSCLK2 pulse will always reset the MUX to sample the Blue channel first. Bits D6, D5, and D4 are used when operating in 1 or 2-Channel Mode. Bit D6 is set high to sample the Red channel. Bit D5 is set high to sample the Green channel. Bit D4 is set high to sample the Blue channel. The MUX will remain stationary during 1-channel mode. Two- Channel Mode is selected by setting two of the channel select Bits (D4–D6) high. The MUX samples the channels in the order selected by Bit D7. PGA Gain Registers There are three PGA registers for individually programming the gain in the Red, Green, and Blue channels. Bits D8, D7, and D6 in each register must be set low, and Bits D5 through D0 control the gain range from 1 × to 6× in 64 increments. See Figure 17 for a graph of the PGA gain versus PGA register code. The coding for the PGA registers is straight binary, with an all “zeros” word corresponding to the minimum gain setting (1 ×) and an all “ones” word corresponding to the maximum gain setting (6 ×). Offset Registers There are three Offset Registers for individually programming the offset in the Red, Green, and Blue channels. Bits D8 through D0 control the offset range from –300 mV to +300 mV in 512 increments. The coding for the Offset Registers is Sign Mag- nitude, with D8 as the sign bit. Table V shows the offset range as a function of the Bits D8 through D0. Table III. MUX Configuration Register Settings D8 D7 D6 D5 D4 D3 D2 D1 D0 Set MUX Order Channel Select Channel Select Channel Select Set Set Set Set to 1 = R-G-B * 1 = RED * 1 = GREEN 1 = BLUE to to to to 0 0 = B-G-R 0 = Off 0 = Off * 0 = Off * 00 00 *Power-on default value. Table IV. PGA Gain Register Settings D8 D7 D6 D5 D4 D3 D2 D1 D0 Gain (V/V) Gain (dB) Set to 0 Set to 0 Set to 0 MSB LSB 000000000 * 1.0 0.0 000000001 1.013 0.12 • • • • • • • • • 000111111 5.56 14.9 000111111 6.0 15.56 *Power-on default value. Table V. Offset Register Settings D8 D7 D6 D5 D4 D3 D2 D1 D0 Offset (mV) MSB LSB 000000000 * 0 000000001 +1.2 • • • • • • 011111111 +300 100000000 0 100000001 –1.2 • • • • • • 111111111 –300 *Power-on default value. |
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