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ADG758 Datasheet(PDF) 11 Page - Analog Devices |
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ADG758 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 12 page ![]() ADG758/ADG759 –11– REV. A OUTPUT 3V 50% ENABLE DRIVE (VIN) 50% 0V V0 tON (EN) 0V 0.9V0 0.9V0 tOFF (EN) A2 D *SIMILAR CONNECTION FOR ADG759 A1 A0 EN GND ADG758* S1 S2 THRU S8 VIN 35pF VDD VSS VDD VSS VS 300 RL CL VOUT 50 Test Circuit 7. Enable Delay, tON (EN), tOFF (EN) LOGIC INPUT (VIN) 3V 0V VOUT QINJ = CL VOUT VOUT A2 VOUT VDD D A1 A0 EN GND ADG758* CL 1nF VDD S VIN RS VSS VSS VS *SIMILAR CONNECTION FOR ADG759 Test Circuit 8. Charge Injection VS VOUT 50 NETWORK ANALYZER RL 50 GND S D VS OFF ISOLATION = 20 LOG VOUT 0.1 F VDD A2 A1 A0 EN 2.4V 0.1 F VSS VDD VSS 50 Test Circuit 9. OFF Isolation *SIMILAR CONNECTION FOR ADG759 CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS A2 D A1 A0 EN GND ADG758* S1 S2 S8 2.4V NETWORK ANALYZER NETWORK ANALYZER RL 50 VOUT VDD 0.1 F VSS 0.1 F VDD VSS 50 VS 50 Test Circuit 10. Channel-to-Channel Crosstalk VS VOUT 50 NETWORK ANALYZER RL 50 GND S D VOUT WITH SWITCH VOUT WITHOUT SWITCH INSERTION LOSS = 20 LOG 0.1 F VDD A2 A1 A0 EN 2.4V 0.1 F VSS VDD VSS Test Circuit 11. Bandwidth Power-Supply Sequencing When using CMOS devices, care must be taken to ensure correct power-supply sequencing. Incorrect power-supply sequencing can result in the device being subjected to stresses beyond the maximum ratings listed in the data sheet. Digital and analog inputs should always be applied after power supplies and ground. For single-supply operation, VSS should be tied to GND as close to the device as possible. |
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