PCM5142 datasheet(36/110 Pages) TI1

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BCK

tBCH

tBCL

tBCY

tBL

tLB

DATA

LRCK

0. 5 * DVDD

(Input)

DATA

0. 5 * DVDD

( Output)

tDOD

PCM5141, PCM5142

SLAS759A – AUGUST 2012 – REVISED SEPTEMBER 2012

www.ti.com

PCM Audio Data Formats and Timing

The PCM514x supports industry-standard audio data formats, including standard I2S and left-justified. Data

formats are selected using the FMT (pin 16), Low for I2S, and High for Left-justified. All formats require binary 2s-

complement, MSB-first audio data; up to 32-bit audio data is accepted.

The PCM514x also supports right-justified and TDM in software control mode. I2S, LJ, RJ, and TDM are selected

using Register (Pg0Reg40). All formats require binary 2s complement, MSB-first audio data. Up to 32 bits are

accepted. Default setting is I2S and 24 bit word length. The I2S slave timing is shown in Figure 27.

Figure 27. PCM514x Serial Audio Timing - Slave

Table 16. Audio Interface Slave Timing

Parameters

Min

Max

Units

tBCY

BCK Pulse Cycle Time

tBCL

BCK Pulse Width LOW

tBCH

BCK Pulse Width HIGH

tBL

BCK Rising Edge to LRCK Edge

tBCK

BCK frequency at DVDD = 3.3V

24.576

MHz

tBCK(1.8V)

BCK frequency at DVDD = 1.8V

12.288

MHz

tLB

LRCK Edge to BCK Rising Edge

tDS

DATA Set Up Time

tDH

DATA Hold Time

tDOD

DATA delay time from BCK falling edge

In software mode, the PCM514x can act as an I2S master, generating BCK and LRCK as outputs from the SCK

input.

Table 17. I2S Master Mode Registers

Function

Page0, Register 9, D(0), D(4), and D(5)

I2S Master mode select

BCK divider and LRCK divider

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