PCM5142 datasheet(5/110 Pages) TI1

5 / 110 page

PCM5141, PCM5142

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SLAS759A – AUGUST 2012 – REVISED SEPTEMBER 2012

PCM514x pin assignments-2 MODE1 tied DGND and MODE2 tied DVDD : I

2C mode

PCM514x (top view)

Table 3. PCM514x I2C mode Terminal Functions

TERMINAL

I/O

DESCRIPTIONS

NAME

CPVDD

Charge pump power supply, 3.3V

CAPP

Charge pump flying capacitor terminal for positive rail

CPGND

Charge pump ground

CAPM

Charge pump flying capacitor terminal for negative rail

VNEG

Negative charge pump rail terminal for decoupling, -3.3V

OUTL

Analog output from DAC left channel

OUTR

Analog output from DAC right channel

AVDD

Analog power supply, 3.3V

AGND

Analog ground

VCOM output (Optional mode selected by register; default setting is VREF mode.) When

VCOM

in VREF mode (default), this pin ties to GND. When in VCOM mode, decoupling capacitor

to GND is required.

SDA

I/O

Input data for I2C(1)(2)

SCL

Input clock for I2C(2)

GPIO5

I/O

General purpose digital input and output port

GPIO4

I/O

General purpose digital input and output port

GPIO3

I/O

General purpose digital input and output port

ADR2

2nd LSB address select bit for I2C

MODE1

Mode-control selection pins(2)

•

MODE1=Low, MODE2=Low : Hardwired mode

•

MODE1=Low, MODE2=High : I2C mode

MODE2

•

MODE1=High : SPI mode, MODE2 pin changes MS pin (chip select

for SPI)

GPIO6

I/O

General purpose digital input and output port

SCK

System clock input(2)

BCK

I/O

Audio data bit clock input (slave) or output (master)(2)

DIN

Audio data input(2)

LRCK

I/O

Audio data word clock input (slave) or output (master)(2)

ADR1

LSB address select bit for I2C

XSMT

Soft mute control : Soft mute (Low) / soft un-mute (High)(2)

LDOO

Internal logic supply rail terminal for decoupling, 1.8V

DGND

Digital ground

DVDD

Digital power supply, 3.3V or 1.8V

(1)

Open-drain configuration in out mode.

(2)

Failsafe LVCMOS Schmitt trigger input.

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