PCF8523TSSLASH1 datasheet(5/75 Pages) NXP

5 / 75 page

PCF8523

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Product data sheet

Rev. 4 — 5 July 2012

5 of 74

NXP Semiconductors

PCF8523

Real-Time Clock (RTC) and calendar

7.2 Pin description

[1]

Wire length between quartz and package should be minimized.

[2]

For manufacturing tests only; do not connect it and do not use it.

[3]

The die paddle (exposed pad) is connected to VSS and should be electrically isolated.

[4]

The substrate (rear side of the die) is connected to VSS and should be electrically isolated.

Viewed from active side. For mechanical details, see Figure 40 on page 57.

Fig 5.

Pin configuration for PCF8523U

013aaa317

PCF8523U

VDD

OSCI

OSCO

VBAT

VSS

INT2

n.c.

CLKOUT

SDA

SCL

n.c.

INT1/CLKOUT

Table 5.

Pin description

Symbol

Type

Description

SO8

(PCF8523T)

HVSON8

(PCF8523TK)

TSSOP14

(PCF8523TS)

PCF8523U

OSCI

input

oscillator input;

high-impedance node[1]

OSCO

output

oscillator output;

high-impedance node[1]

n.c.

3, 6, 9, 12[2]

6 and 11[2]

not connected; do not connect

and do not use it as feed through

VBAT

supply

battery supply voltage

VSS

44[3]

55[4]

supply

ground supply voltage

INT2

output

interrupt 2 (open-drain, active

LOW)

CLKOUT

output

clock output (open-drain)

SDA

input/output serial data input/output

SCL

input

serial clock input

INT1/CLKOUT 7

output

interrupt 1/clock output

(open-drain)

VDD

supply

supply voltage

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