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PCF8523TS/1 Datasheet(PDF) 12 Page - NXP Semiconductors

Part # PCF8523TS/1
Description  Real-Time Clock (RTC) and calendar
PDF  75 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8523TS/1 Datasheet(HTML) 12 Page - NXP Semiconductors

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PCF8523
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 July 2012
12 of 74
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
8.3 Reset
A reset is automatically generated at power-on. A reset can also be initiated with the
software reset command. Software reset command means setting bits 6, 4, and 3 in
register Control_1 (00h) logic 1 and all other bits logic 0 by sending the bit sequence
01011000 (58h), see Figure 7.
Fig 7.
Software reset command
s
1
10
10
00
0
A
000
0
0
0
0
0
A
0
10
1
10
00
A P/S
SDA
SCL
internal
reset signal
slave address byte
address 00h
software reset 58h
R/W
013aaa320
Table 10.
Register reset values
Bits labeled X are undefined at power-on and unchanged by subsequent resets. Bits labeled - are
not implemented.
Address Register name
Bit
7
6
5
4
3
2
1
0
00h
Control_1
0
0
0
0
0
0
0
0
01h
Control_2
0
0
0
0
0
0
0
0
02h
Control_3
1
1
1
-
0
0
0
0
03h
Seconds
1
XXXXXXX
04h
Minutes
-
XXXXXXX
05h
Hours
-
-
XXXXXX
06h
Days
-
-
XXXXXX
07h
Weekdays
-----X
X
X
08h
Months
-
-
-
XXXXX
09h
Years
XXXXXXXX
0Ah
Minute_alarm
1
XXXXXXX
0Bh
Hour_alarm
1
-
XXXXXX
0Ch
Day_alarm
1
-
XXXXXX
0Dh
Weekday_alarm
1
----X
X
X
0Eh
Offset
00000000
0Fh
Tmr_CLKOUT_ctrl
00000000
10h
Tmr_A_freq_ctrl
-----1
1
1
11h
Tmr_A_reg
XXXXXXXX
12h
Tmr_B_freq_ctrl
-
0
0
0
-
1
1
1
13h
Tmr_B_reg
XXXXXXXX



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