REV. B

ADP3415

–3–

ABSOLUTE MAXIMUM RATINGS

*

VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

BST to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V

BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

SW to GND . . . . . . . . . . . . . . . . . . . . . . . . . –2.0 V to +25 V

SD, IN, DRVLSD to GND . . . . . . . . . . . . . . –0.3 V to +7.3 V

Operating Ambient Temperature Range . . . . . . 0

°C to 100°C

Operating Junction Temperature Range . . . . . . 0

°C to 125°C

JA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155

°C/W

JC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

°C/W

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300

°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability. Absolute maximum

ratings apply individually only, not in combination. Unless otherwise specified, all

other voltages are referenced to GND.

PIN CONFIGURATION

TOP VIEW

(Not to Scale)

10

9

8

7

6

1

2

3

4

5

IN

SD

DRVLSD

DLY

BST

DRVH

SW

GND

ADP3415

VCC

DRVL

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although the

ADP3415 features proprietary ESD protection circuitry, permanent damage may occur on devices

subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended

to avoid performance degradation or loss of functionality.

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

1IN

TTL-Level Input Signal. Has primary control of the drive outputs.

2

SD

Shutdown. When high, this pin enables normal operation. When low, DRVH and DRVL are forced low

3

DRVLSD

Drive-Low Shutdown. When

DRVLSD is low, DRVL is kept low. When DRVLSD is high, DRVL is

enabled and controlled by IN and by the adaptive OPC function.

4

DLY

High-Side Turn-On Delay. A resistor from this pin to ground programs an extended delay from turn-off

of the lower FET to turn-on of the upper FET.

5

VCC

Input Supply. This pin should be bypassed to GND with a ~10

µF ceramic capacitor.

6

DRVL

Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) FET.

7GND

Ground. Should be directly connected to the ground plane, close to the source of the lower FET.

8SWThis pin should be connected to the buck switching node, close to the upper FET’s source. It is the

floating return for the upper FET drive signal. Also, it is used to monitor the switched voltage for the

OPC function.

9

DRVH

Buck Drive. Output drive for the upper (buck) FET.

10

BST

Floating Bootstrap Supply for the Upper FET. A capacitor connected between BST and SW pins holds

this bootstrapped supply voltage for the high-side FET driver as it is switched. The capacitor should be

an MLC type and should have substantially greater capacitance (e.g., ~ 20

×) than the input capacitance

of the upper FET.

ORDERING GUIDE

Temperature

Package

Package

Quantity

Model

Guide

Description

Option

per Reel

Branding

ADP3415LRM-REEL

0

°C to 100°C

MSOP

RM-10

3,000

P1E

ADP3415LRM-REEL7

0

°C to 100°C

MSOP

RM-10

1,000

P1E

ADP3415LRMZ-REEL

*

0

°C to 100°C

MSOP

RM-10

3,000

P1E

*Z = Pb-free part.