TAS2505 datasheet(3/30 Pages) TI

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RST

AINR

SPI_SEL

AINL

AVSS

HPOUT

WCLK

BCLK

MCLK

MISO

DIN

GPIO/DOUT

TAS2505

www.ti.com

SLAS778A – FEBRUARY 2013 – REVISED FEBRUARY 2013

2.2

Device Information

RGE PACKAGE

(TOP VIEW)

Table 2-1. RGE PIN FUNCTIONS

I/O(1)

DESCRIPTION

NAME

NO.

SPI_SEL

Selects between SPI and I2C digital interface modes; (1 = SPI mode) (0 = I2C mode)

RST

Reset for logic, state machines, and digital filters; asserted LOW.

AINL

Analog single-ended line left input

AINR

Analog single-ended line right input

HPOUT

Headphone and Lineout Driver Output

AVSS

GND

Analog Ground, 0V

AVDD

PWR

Analog Core Supply Voltage, 1.5V - 1.95V, tied internally to the LDO output

LDO_SEL

Select Pin for LDO; ties to either SPKVDD or SPKVSS

SPKM

Class-D speaker driver inverting output

SPKVDD

PWR

Class-D speaker driver power supply

SPKVSS

PWR

Class-D speaker driver power supply ground supply

SPKP

Class-D speaker driver non-inverting output

DIN

Audio Serial Data Bus Input Data

WCLK

I/O

Audio Serial Data Bus Word Clock

BCLK

I/O

Audio Serial Data Bus Bit Clock

MCLK

Master CLK Input / Reference CLK for CLK Multiplier - PLL (On startup PLLCLK = CLKIN)

MISO

SPI Serial Data Output

GPIO/DOUT

I/O/Z

GPIO / Audio Serial Bus Output

SCL/SSZ

Either I2C Input Serial Clock or SPI Chip Select Signal depending on SPI_SEL state

SDA/MOSI

Either I2C Serial Data Input or SPI Serial Data Input depending on SPI_SEL state.

SCLK

Serial clock for SPI interface

IOVDD

PWR

I/O Power Supply, 1.1V - 3.6V

DVDD

PWR

Digital Power Supply, 1.65V - 1.95V

DVSS

GND

Digital Ground, 0V

(1)

I = Input, O = Output, GND = Ground, PWR = Power, Z = High Impedance

PACKAGE AND SIGNAL DESCRIPTIONS

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