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LTC2315-12

231512f

For more information www.linear.com/2315-12

applicaTions inForMaTion

Figure 13. 16k Point FFT of the LTC2315-12 at fIN = 500 kHz

Figure 14. LTC2315-12 ENOB/SINAD vs fIN

Figure 15. LTC2315-12 IMD Plot

If two pure sine waves of frequencies fa and fb are ap-

plied to the ADC input, nonlinearities in the ADC transfer

function can create distortion products at the sum and

difference frequencies m • fa ± n • fb , where m and n = 0,

1, 2, 3, etc. For example, the 2nd order IMD terms include

(fa±fb).Ifthetwoinputsinewavesareequalinmagnitude,

the value (in decibels) of the 2nd order IMD products can

be expressed by the following formula:

IMD(fa ± fb) = 20 • log[VA (fa ± fb)/VA (fa)]

The LTC2315-12 has excellent IMD as shown in Figure 15.

Spurious Free Dynamic Range (SFDR)

The spurious free dynamic range is the largest spectral

componentexcludingDC,theinputsignalandtheharmon-

ics included in the THD. This value is expressed in decibels

relative to the RMS value of a full-scale input signal.

Full-Power and Full-Linear Bandwidth

The full-power bandwidth is the input frequency at which

theamplitudeofthereconstructedfundamentalisreduced

by 3dB for a full-scale input signal.

The full-linear bandwidth is the input frequency at which

the SINAD has dropped to 69dB (11.2 effective bits). The

LTC2315-12 has been designed to optimize the input

bandwidth,allowingtheADCtounder-sampleinputsignals

with frequencies above the converter’s Nyquist frequency.

The noise floor stays very low at high frequencies and

SINAD becomes dominated by distortion at frequencies

beyond Nyquist.

Recommended Layout

To obtain the best performance from the LTC2315-12 a

printed circuit board is required. Layout for the printed

circuit board (PCB) should ensure the digital and analog

signal lines are separated as much as possible. In particu-

lar, care should be taken not to run any digital clocks or

signals alongside analog signals or underneath the ADC.

ThefollowingisanexampleofarecommendedPCBlayout.

A single solid ground plane is used. Bypass capacitors to

the supplies are placed as close as possible to the supply

pins. Low impedance common returns for these bypass

capacitors is essential to the low noise operation of the

ADC. The analog input traces are screened by ground.

231512 F13

FREQUENCY (kHz)

2500

2000

1000

500

1500

–20

–40

–60

–80

–100

–120

–140

VDD = 5V

SNR = 73.1dBFS

SINAD = 72.6dBFS

THD = –84dB

SFDR = 87dBc

INPUT FREQUENCY (kHz)

11.2

11.3

11.5

11.7

11.8

12.0

500

1000

1500

2000

2500

231512 F14

VDD = 5V

VDD = 3V

INPUT FREQUENCY (kHz)

–160

–120

–140

–80

–100

–60

–40

–20

500

1000

1500

2000

2500

231512 F15

VDD = 5V

fS = 5Msps

fa = 461.421kHz

fb = 541.421kHz

IMD2 (fb + fa) = –77.4dBc

IMD3 (2fb –fa) = –89.4dBc

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