Aeroflex Circuit Technology

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5

Synchronize Mode Commands

Once the RT has validated the command word and checked for the correct address, the SYNC line is set low.

The signal WC4 will be set low for a Synchronize mode command (See Figure 16), and high for a Synchronize

with data word mode command (See Figure 15). In a Synchronize with data word mode command, SYNC

remains low during the time that the data word is received. Once the data word has been validated, it is passed

to the subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as

the byte indicator (high byte first followed by low byte). SYNC being low should be used on the enable to allow

IUSTB to clock synchronize mode data to the subsystem.

If the subsystem does not need to implement either of these mode commands, the SYNC signal can be ignored,

since the RT requires no response from the subsystem.

Transmit Vector Word Mode Command

Figure 14 illustrates the relevant signal timings for an RT receiving a valid Transmit Vector Word mode

command. The RT requests data by setting VECTEN low. The subsystem should use H/L to enable first the high

byte and then the low byte of the Vector word onto the internal highway IH08-IH715.

It should be noted that the RT expects the Vector word contents to be already prepared in a latch ready for

enabling onto the internal highway when VECTEN goes low. If the subsystem has not been designed to handle

the Vector word mode command, it will be the fault of the Bus Controller if the RT receives such a command.

Since the subsystem is not required to acknowledge the mode command, the RT will not be affected in any way

by Vector word circuitry not being implemented in the subsystem. It will however transmit a data word as the

Vector word, but this word will have no meaning.

Reset Mode Command

Figure 8 shows the relevant signal timings for an RT receiving a valid reset mode command. Once the command

word has been fully validated and serviced, the RESET signal is pulsed low. This signal may be used as a reset

function for subsystem interface circuitry.

Dynamic Bus Allocation

This mode command is intended for use with a terminal which has the capability of configuring itself into a bus

controller on command from the bus. The line DBCREQ cannot go true unless the DBCACC line was true at the

time of the valid command, i.e. tied low. For terminals acting only as RTs, the signal DBCACC should be tied

high (inactive), and the signal DBCREQ should be ignored and left unconnected.

Use of the Busy Status Bit

The Busy Bit is used by the subsystem to indicate that it is not ready to handle data transfers either to or from

the RT.

The RT sets the bit to logic one if the BUSY line from the subsystem is active low at the time of the second falling

edge of INCLK after INCMD goes low. This is shown in Figure 13. Once the Busy bit is set, the RT will stop all

receive and transmit data word transfers to and from the subsystem. The data transfers in the Synchronize with

data word and Transmit Vector word mode commands are not affected by the Busy bit and will take place even if

it has been set.

It should be noted that a minimum of 0.5 µs subaddress decoding time is given to the subsystem before setting

of status bits. This allows the subsystem to selectively set the Busy bit if for instance one subaddress is busy but

others are ready. This option will prove useful when an RT is interfacing with multiple subsystems.

Use of the Service Request Status Bit

The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous

service is requested.

The timing of the setting of this bit is the same as the Busy bit and is shown in Figure 13. Use of SERVREQ has

no effect on the RT apart from setting the Service Request bit.

It should be noted that certain mode commands require that the last status word be transmitted by the RT