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AD9789BBCZ Datasheet(PDF) 40 Page - Analog Devices |
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AD9789BBCZ Datasheet(HTML) 40 Page - Analog Devices |
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40 / 76 page ![]() AD9789 Rev. A | Page 40 of 76 Table 50. QAM Mapper Input and Output Range vs. Mode ITU-T J.83 Annex Description SPI Register 0x07, MAPPING[2:0] Bits Bit Range at Output Input Bits B7 B6 B5 B4 B3 B2 B1 B01 B DOCSIS 64-QAM 000 −14 to +14 X X C5 C4 C3 C2 C1 C0 B DOCSIS 256-QAM 001 −15 to +15 C7 C6 C5 C4 C3 C2 C1 C0 A DVB-C 16-QAM 010 −15 to +15 X X X X C3 C2 C1 C0 A DVB-C 32-QAM 011 −15 to +15 X X X C4 C3 C2 C1 C0 A and C DVB-C 64-QAM 100 −14 to +14 X X C5 C4 C3 C2 C1 C0 A and C DVB-C 128-QAM 101 −11 to +11 X C6 C5 C4 C3 C2 C1 C0 A and C DVB-C 256-QAM 110 −15 to +15 C7 C6 C5 C4 C3 C2 C1 C0 Unused 111 1 X = don’t care. Each constellation point corresponds to an I and Q coordinate pair, as shown in Figure 74. In the figure, two symbols are high- lighted in a 64-QAM constellation: I = 14, Q = 14 (Pair 1) and I = 6, Q = −10 (Pair 2). To represent the I and Q coordinate points, 5-bit, twos com- plement numbers are used. For example, an input of 011101 into the QAM encoder maps to the I = 6, Q = −10 position of the QAM-64 constellation and results in output samples of I = 00110, Q = 10110. I Q 14 10 6 2 –2 –6 –10 –14 –14 –10 –6 –2 2 6 10 14 SYMBOL I = 14, Q = 14 I = 01110, Q = 01110 SYMBOL I = 6, Q = –10 I = 00110, Q = 10110 Figure 74. I and Q Symbol Mapping SRRC 2 BYPASS SRRC BYPASS QAM X INSCALE QAM MAPPER 16 16 5 8 16 5 16 16 Figure 75. QAM Mapper and SRRC Filter Detail (I and Q Paths Are Identical So Only One Is Shown) Input Scalar The input scalar block is active only when the QAM mapper is bypassed. The value of INSCALE[7:0] is programmed in Register 0x09[7:0]. The scale factor applied to the input data is calculated as follows: 32 0] INSCALE[7: r ScaleFacto This factor provides a scaling range of the input data from 0 to 7.96875 in steps of 0.03125. The default value of 0x20 provides a scale factor of 1. As shown in Figure 76, the output of the input scalar block is rounded to the nearest 16-bit value. If the output exceeds the maximum or minimum value, it is clipped to either positive or negative full scale (0x7FFF or 0x8000). ROUND SATURATE INSCALE 8 Figure 76. Input Scalar Block Diagram SRRC Filter The square root raised cosine (SRRC) filter performs a 2× interpolation and filtering operation on the input data. The SRRC filter has a pass band, transition band, and stop band requirement as per the DOCSIS, Euro-DOCSIS, and DVB-C standards. To cover all the standards, the value of alpha can be set to 0.12, 0.13, 0.15, or 0.18. This value is programmed in Register 0x07[5:4]. The frequency, fN, is determined by the input data baud rate. The response of the SRRC filter is illustrated in Figure 77. The SRRC filter accepts only five bits at its input and can be bypassed (Register 0x06[6]). If the SRRC filter is the first block enabled in the datapath, these five bits are the five MSBs of the 8-bit data-word. |
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