IP1837 datasheet(5/40 Pages) IRF

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iP1837

Highly Integrated 35A Single‐input Voltage,

Synchronous Buck Regulator

March 5, 2012 | V1.26

97600

PIN DESCRIPTIONS

PIN #

PIN NAME

PIN DESCRIPTION

VIN

Input voltage for power stage. Bypass capacitors between VIN and PGND should be connected very

close to this pin and PGND (pin 3).

Switch node. This pin is connected to the output inductor.

PGND

Power ground. This pin should be connected to the system’s power ground plane. Bypass

capacitors between VIN and PGND should be connected very close to VIN pin (pin 1) and this pin.

PVCC

Output of internal charge pump. Connect a 4.7uF to 10uF capacitor from this pin to local bias PGND

(pin 12), very close to the pins. External 5V may also be connected to this pin for operation from 5V

bias.

Soft start; a capacitor from SS and LGND sets the startup timing.

LGND

Signal ground for internal reference and control circuitry.

VOSM

Remote Sense Amplifier input. Connect to ground at the load.

VOSP

Remote Sense Amplifier input. Connect to output at the load.

Use an external resistor from this pin to GND to set the switching frequency, very close to the pin.

VCC

Input bias voltage for internal IC. This also powers the charge pump circuit in the IC. Connect a

10uF capacitor from this pin to local bias PGND (pin 12), very close to the pins. For 5V bias

operation, this pin should be tied to ground.

OCSET

Current Limit setpoint. A resistor may be connected from this pin to SW pin to set thresholds lower

than those allowed by maximum current rating of the device.

BIASGND

This pin serves as a ground for the MOSFET drivers. It should be connected to the negative terminal

of the bias voltage at the VCC and/or PVCC capacitors.

PGD

Power Good status pin. Output is open collector. Connect a pull up resistor from this pin to VCC.

Enable pin to turn on and off the IC.

VOSO

Remote Sense Amplifier Output; also forms an input to the power good comparator and

overvoltage comparator.

COMP

Output of error amplifier. An external resistor and capacitor network is typically connected from

this pin to FB to provide loop compensation.

Inverting input to the error amplifier. This pin is connected directly to the output of the regulator

or to the output of the remote sense amplifier, via resistor divider to set the output voltage and

provide feedback to the error amplifier.

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