IP1837 datasheet(17/40 Pages) IRF

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iP1837

Highly Integrated 35A Single‐input Voltage,

Synchronous Buck Regulator

March 5, 2012 | V1.26

97600

An overcurrent detection trips the OCP comparator,

latches OCP signal and cycles the soft start function in

hiccup mode. The hiccup is performed by shorting the

soft‐start capacitor to ground and counting the number of

switching cycles. The Soft Start pin is held low until 4096

cycles have been completed.

Following this, the OCP signal resets and the converter

recovers. After every soft start cycle, the converter stays in

this mode until the overload or short circuit is removed.

For the iP1837, the Sync FET is turned OFF on the falling

edge of a PWMSet or Clock signal that has a duration of

25% of the switching period.

For operation at the maximum duty cycle, the OCP circuit

samples current for 40 ns, starting 40 ns after the low drive

signal for the Sync FET > 70% of PVcc.

TABLE 2: OVERCURRENT SETTING VS. EXTERNAL ROCSET

Iotrip (A)

External Rocset (kohm)

4.02

4.42

4.87

5.4

6.04

6.8

7.68

8.66

11.5

13.7

16.2

26.1

35.7

54.9

113

Open

For operating duty cycles less than the maximum duty

cycle of 75%, the OCP circuit still samples current for

typically 40ns, but starts sampling 40 ns after the rising

edge of PWMSet .

Thus, for low duty cycle operation, the inductor current is

sensed close to the valley. This allows a longer delay after

the falling edge of the switch node, than the corresponding

delay for an over‐current sensing scheme which samples

the current at the peak of the inductor current. This longer

delay serves to filter out any noise on the switch node and

hence on the OCSet pin, making this method more

immune to false tripping.

THERMAL SHUTDOWN

Temperature sensing is provided inside iP1837.

The trip threshold is typically set to 145

oC. When the

trip threshold is exceeded, thermal shutdown turns

off both MOSFETs and discharges the soft start capacitor.

Automatic restart is initiated when the sensed

temperature drops within the operating range. There

is a 20

oC hysteresis in the thermal shutdown threshold.

TRIMMABLE RISING EDGE DEADBAND

The iP1837 has a rising edge deadband that is post‐

package trimmable. It is typically trimmed to 5ns‐10ns

which is an optimal range to minimize switching transition

loss and at the same time, prevent cross conduction.

REMOTE VOLTAGE SENSING

True differential remote sensing in the feedback loop is

critical to high current applications where the output

voltage across the load may differ from the output voltage

measured locally across an output capacitor at the output

inductor, and to applications that require die voltage

sensing.

The Vosp and Vosm pins of the iP1837 form the inputs to

a remote sense differential amplifier with high speed, low

input offset (post‐package trimmed to +/‐3mV) and low

input bias current which ensure accurate voltage sensing

and fast transient response in such applications.

It should be noted, however, that the output Voso of the

difference amplifier also forms the input toa power good

comparator and overvoltage comparator, both referenced

to an upper threshold of 0.7V as discussed in the next

section. Hence, in applications where Vo > 0.6V, it is

necessary to use a resistive divider network after Vo to

attenuate the sensed output voltage signal between the

remote Vo and the remote ground to 0.6V, which is then

applied between Vosp and Vosm.

IP1837 Datasheet(PDF) 17 Page - International Rectifier

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