OPA317

OPA2317

OPA4317

SBOS682A – MAY 2013 – REVISED JUNE 2013

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GENERAL LAYOUT GUIDELINES

Attention to good layout practice is always recommended. Keep traces short and, when possible, use a printed

circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.

Place a 0.1-

μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to

improve performance and provide benefits, such as reducing the electromagnetic interference (EMI)

susceptibility.

Optimize circuit layout and mechanical conditions for lowest offset voltage and precision performance. Avoid

temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from

connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they

are equal on both input terminals. Other layout and design considerations include:

•

Use low thermoelectric-coefficient conditions (avoid dissimilar metals).

•

Thermally isolate components from power supplies or other heat sources.

•

Shield op amp and input circuitry from air currents, such as cooling fans.

Following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause

thermoelectric voltages of 0.1

μV/°C or higher, depending on the materials used.

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