MPC9772 REVISION 7 JANUARY 8, 2013

5

©2013 Integrated Device Technology, Inc.

MPC9772 Data Sheet

3.3V 1:12 LVCMOS PLL CLOCK GENERATOR

1

0

1

VCO

4

1

1

0

VCO

6

1

1

1

VCO

8

Table 6. Output Divider PLL Feedback (M)

VCO_SEL

FSEL_FB2

FSEL_FB1

FSEL_FB0

QFB

0

0

0

0

VCO

8

0

0

0

1

VCO

12

0

0

1

0

VCO

16

0

0

1

1

VCO

20

0

1

0

0

VCO

16

0

1

0

1

VCO

24

0

1

1

0

VCO

32

0

1

1

1

VCO

40

1

0

0

0

VCO

4

1

0

0

1

VCO

6

1

0

1

0

VCO

8

1

0

1

1

VCO

10

1

1

0

0

VCO

8

1

1

0

1

VCO

12

1

1

1

0

VCO

16

1

1

1

1

VCO

20

Table 7. General Specifications

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

Output Termination Voltage

V

MM

ESD Protection (Machine Model)

200

V

HBM

ESD Protection (Human Body Model)

2000

V

LU

Latch-Up Immunity

200

mA

Power Dissipation Capacitance

12

pF

Per output

Input Capacitance

4.0

pF

Inputs

1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these

conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated

conditions is not implied.

Symbol

Characteristics

Min

Max

Unit

Condition

Supply Voltage

–0.3

3.9

V

DC Input Voltage

–0.3

V

DC Output Voltage

–0.3

V

DC Input Current

20

mA

DC Output Current

50

mA

Storage Temperature

–65

125

C

VCO_SEL

FSEL_C1

FSEL_C0

QC[0:3]