GD82559C datasheet(13/60 Pages) INTEL

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Intel-Based Electronic Classroom Student Computing Station

Application Note

5.0

Design Consideration of Intel-Based Electronic

Classroom Student Computing Station Hardware

5.1

Intel® Celeron™ Processor

This reference configuration supports the Intel Celeron processor at 300, 366 MHz and 433 MHz

in a Plastic PinGridArray(PPGA) package.

The Intel Celeron processor PPGA package implements a Dynamic Execution micro-architecture

and executes MMX™ media technology instructions for enhanced media and communication

performance. The Intel Celeron processor PPGA is based on the P6 family processor core and is

provided in a PPGA package for use in low cost systems in the value PC and Intel-based electronic

classroom student computing station market segments. The Intel Celeron processor PPGA utilizes

the AGTL+ system bus used by the Pentium

® II processor with support limited to single-processor

systems. The Intel Celeron processor PPGA includes an integrated 128 Kbyte second level cache

with separate 16 Kbyte instruction and 16 Kbyte data level-one caches. The second level cache is

capable of caching 4 Gbytes of system memory.

5.1.1

Design Notes for the Intel® Celeron™ Processor

The schematics use a Single Ended Termination (SET) network topology in which the termination

resistors are located at only the PPGA (processor) side to reduce the system cost, solution space,

and ringing effect. In the SET topology, the termination should be placed close to the processor

either on the motherboard or on the processor substrate. No termination is present at the chipset end

of the network.

Figure 3.

Topology for Single Processor Designs with Single End Termination (SET)

A7494-01

†

- 1.9" <L1 <5.0"

††

- 0.5" <L2 <2.0"

L2††

L1†

VTT

Intel® 810

Chipset

GD82559C Datasheet(PDF) 13 Page - Intel Corporation