PCA9537_5

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 05 — 7 May 2009

6 of 24

NXP Semiconductors

PCA9537

6.2.5 Register 3 - Configuration register

This register configures the directions of the I/O pins. If a bit in this register is set, the

corresponding port pin is enabled as an input with high-impedance output driver. If a bit in

this register is cleared, the corresponding port pin is enabled as an output. At reset, the

I/Os are configured as inputs.

6.3 Power-on reset

and the PCA9537 registers and state machine will initialize to their default states.

operating voltage.

6.4 RESET input

state until the RESET input is once again HIGH. This input requires a pull-up resistor to

6.5 Interrupt output

The open-drain interrupt output (INT) is activated when one of the port pins changes state

and the pin is configured as an input. The interrupt is de-activated when the input returns

to its previous state or the Input Port register is read.

Note that changing an I/O from an output to an input may cause a false interrupt to occur

if the state of the pin does not match the contents of the Input Port register.

Table 7.

Register 3 - Configuration register bit description

Legend: * default value.

Bit

Symbol

Access

Value

Description

7

C7

R/W

1*

not used

6

C6

R/W

1*

5

C5

R/W

1*

4

C4

R/W

1*

3

C3

R/W

1*

configures the directions of the I/O pins

0 = corresponding port pin enabled as an output

1 = corresponding port pin configured as an input

(default value)

2

C2

R/W

1*

1

C1

R/W

1*

0

C0

R/W

1*