PCA9537DP datasheet(10/24 Pages) NXP

10 / 24 page

PCA9537_5

Product data sheet

Rev. 05 — 7 May 2009

10 of 24

NXP Semiconductors

PCA9537

4-bit I2C-bus and SMBus low power I/O port with interrupt and reset

Application design-in information

7.1 Minimizing IDD when the I/Os are used to control LEDs

When the I/Os are used to control LEDs, they are normally connected to VDD through a

resistor as shown in Figure 9. Since the LED acts as a diode, when the LED is off the I/O

VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes lower

than VDD.

Designs needing to minimize current consumption, such as battery power applications,

should consider maintaining the I/O pins greater than or equal to VDD when the LED is off.

Figure 10 shows a high value resistor in parallel with the LED. Figure 11 shows VDD less

than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI

at or above VDD and prevents additional supply current consumption when the LED is off.

Device address is 1001 001x for this example.

IO0, IO2, IO3 conﬁgured as outputs.

IO1 conﬁgured as input.

Fig 9.

Typical application

PCA9537

IO0

IO1

SCL

SDA

VDD

(5 V)

MASTER

CONTROLLER

SCL

SDA

INT

IO2

VDD

VSS

INT

10 k

Ω

SUB-SYSTEM 1

(e.g., temp sensor)

IO3

INT

SUB-SYSTEM 2

(e.g., counter)

RESET

controlled

switch

(e.g., CBT device)

enable

VSS

002aae640

10 k

Ω

10 k

Ω

2 k

Ω

100 k

Ω

RESET

10 k

Ω

Fig 10. High value resistor in parallel with

the LED

Fig 11. Device supplied by a lower voltage

002aac660

LED

VDD

IOn

100 k

Ω

VDD

002aac661

LED

VDD

IOn

3.3 V

5 V

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