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GD82541PI Datasheet(PDF) 1 Page - Intel Corporation |
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GD82541PI Datasheet(HTML) 1 Page - Intel Corporation |
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1 / 46 page  82541 Family of Gigabit Ethernet Controllers Networking Silicon - 82541(PI/GI/EI) Datasheet Product Features ■ PCI Bus — PCI revision 2.3, 32-bit, 33/66 MHz — Algorithms that optimally use advanced PCI, MWI, MRM, and MRL commands — CLK_RUN# signal — 3.3 V (5 V tolerant PCI signaling) ■ MAC Specific — Low-latency transmit and receive queues — IEEE 802.3x-compliant flow-control support with software-controllable thresholds — Caches up to 64 packet descriptors in a single burst — Programmable host memory receive buffers (256 B to 16 KB) and cache line size (16 B to 256 B) — Wide, optimized internal data path architecture — 64 KB configurable Transmit and Receive FIFO buffers ■ PHY Specific — Integrated for 10/100/1000 Mb/s full- and half-duplex operation — IEEE 802.3ab Auto-Negotiation and PHY compliance and compatibility — State-of-the-art DSP architecture implements digital adaptive equalization, echo and cross- talk cancellation — Automatic polarity detection — Automatic detection of cable lengths and MDI vs. MDI-X cable at all speeds ■ Host Off-Loading — Transmit and receive IP, TCP, and UDP checksum off-loading capabilities — Transmit TCP segmentation and advanced packed filtering — IEEE 802.1Q VLAN tag insertion and stripping and packet filtering for up to 4096 VLAN tags — Jumbo frame support up to 16 KB — Intelligent Interrupt generation (multiple packets per interrupt) ■ Manageability — On-chip SMBus 2.0 port — ASF 1.0 and 2.0 — Compliance with PCI Power Management v1.1/ACPI v2.0 — Wake on LAN* (WoL) support — Smart Power Down mode when no signal is detected on the wire — Power Save mode switches link speed from 1000 Mb/s down to 10 or 100 Mb/s when on battery power ■ Additional Device — Four programmable LED outputs — On-chip power regulator control circuitry — BIOS LAN Disable pin — JTAG (IEEE 1149.1) Test Access Port built in silicon (3.3 V, 5 V tolerant PCI signaling) ■ Lead-free a 196-pin Ball Grid Array (BGA). Devices that are lead-free are marked with a circled “e1” and have the product code: LUxxxxxx. a. This device is lead-free. That is, lead has not been intentionally added, but lead may still exist as an impurity at <1000 ppm. The Material Declaration Data Sheet, which includes lead impurity levels and the concentration of other Restriction on Hazardous Substances (RoHS)-banned materials, is available at: ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks In addition, this device has been tested and conforms to the same parametric specifications as previous versions of the device. For more information regarding lead-free products from Intel Corporation, contact your Intel Field Sales represen- tative 318138-002 Revision 2.7 |
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