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EP3SE110 Datasheet(PDF) 28 Page - Altera Corporation |
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EP3SE110 Datasheet(HTML) 28 Page - Altera Corporation |
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28 / 341 page  1–18 Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics Switching Characteristics Stratix III Device Handbook, Volume 2 © July 2010 Altera Corporation TriMatrix Memory Block Specifications Table 1–22 lists the Stratix III TriMatrix Memory Block specifications. Table 1–22. TriMatrix Memory Block Performance Specifications for Stratix III Devices (Note 1) (Part 1 of 3) Memory Block Type Mode ALUTs TriMatrix Memory C2 (6) C3 C4 C4L I3 I4 I4L Unit V CCL = 1.1 V V CCL = 1.1 V V CCL = 1.1 V V CCL = 1.1 V V CCL = 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V MLAB Single port 16 × 10 0 1 600 500 450 450 340 475 450 320 MHz Simple dual-port 16 20 0 1 600 500 450 450 340 475 450 320 MHz ROM 64 × 10 0 1 600 500 450 450 370 475 450 350 MHz ROM 32 × 20 0 1 600 500 450 450 340 475 450 320 MHz M9K (2) Single-port 8K × 1 0 1 550 465 390 390 245 440 390 230 MHz Single-port 4K × 2 or 2K × 4 0 1 575 485 405 405 255 460 405 230 MHz Single-port 1K × 9, 512 × 18, or 256×36 0 1 565 475 395 395 245 450 395 220 MHz Simple dual-port, 8K × 1 0 1 545 460 385 385 240 435 385 225 MHz Simple dual-port, 4K × 2 or 2K × 4 0 1 570 480 400 400 250 455 400 225 MHz Simple dual-port, 1K × 9, 512 × 18, or 256 × 36 0 1 565 475 395 395 245 450 395 220 MHz Simple dual-port, 8K × 1, 4K × 2 or 2K × 4 with read-during-write option set to Old Data 0 1 375 312 265 265 205 295 265 185 MHz Simple dual-port, 1K × 9, 512 × 18, 256 × 36 with read-during-write option set to Old Data 0 1 375 312 265 265 200 295 265 180 MHz True dual-port, 8K × 1 0 1 530 440 370 370 230 420 370 215 MHz True dual-port, 4K × 2 or 2K × 4 0 1 550 460 385 385 240 435 385 215 MHz True dual-port, 1K × 9 or 512 × 18 0 1 545 460 380 380 235 435 380 210 MHz True dual-port, 8K × 1, 4K × 2, or 2K × 4 with read-during-write option set to Old Data 0 1 350 295 245 245 175 280 245 160 MHz True dual-port, 1K × 9 or 512 × 18 with read-during-write option set to Old Data 0 1 340 285 240 240 165 270 240 150 MHz ROM 1P, 8K × 1, 4K × 2, or 2K × 4 0 1 580 485 405 405 260 460 405 235 MHz ROM 1P, 1K × 9, 512 × 18, or 256×36 0 1 575 485 405 405 255 460 405 230 MHz ROM 2P, 8K × 1, 4K × 2, or 2K × 4 0 1 580 485 405 405 265 460 405 240 MHz ROM 2P, 1K × 9, or 512 × 18 0 1 575 485 405 405 260 460 405 235 MHz Min Pulse Width (Clock High Time) — — 800 1000 1100 1100 1800 1000 1100 1800 ps Min Pulse Width (Clock Low Time) — — 500 625 690 690 1100 625 690 1100 ps |
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