APA150 datasheet(169/178 Pages) ACTEL

169 / 178 page

ProASICPLUS Flash Family FPGAs

v5.9

4-1

Datasheet Information

List of Changes

The following table lists critical changes that were made in the current version of the document.

Previous version

Changes in current version (v5.9)

Page

v5.8

(June 2009)

The –F speed grade is no longer supported and was removed from the datasheet.

N/A

A note regarding RoHS compliant packages was added to the "Device Resources" table.

iii

v5.7

(September 2008)

The "PLL Electrical Specifications" table was updated significantly. Changes were made to the

Input, VCO (Voltage Controlled Oscillator), and Output frequencies, and the acquisition time.

2-18

Table 2-10 • PLL I/O Constraints is new.

2-19

Table 2-23 • DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V)

Applies to Commercial and Industrial Temperature Only is the same table that was in v5.7, but it

now only applies to commercial and industrial temperature ranges. Table 2-24 • DC Electrical

Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V) Applies to Military Temperature

and MIL-STD-883B Temperature Only is based on Table 2-23 but Table 2-24 only applies to

military temperature. The VOH and VOL specifications were updated in Table 2-24, and changes

have been made to the drive currents at which 3.3 V VOH and VOL voltage levels are measured

and are now split by slew rate. In addition in Table 2-24, the maximum VIL specification has

changed from 0.8 V to 0.7 V for 3.3 V Schmitt-trigger input operation.

2-38

v5.6

(August 2008)

VOH and VOL data in Table 2-24 • DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD =

2.5 V ±0.2 V) Applies to Military Temperature and MIL-STD-883B Temperature Only was

changed back to the data in v5.5.

2-38

v5.5

(February 2007)

VOH and VOL data was updated in Table 2-24 • DC Electrical Specifications (VDDP = 3.3 V ±0.3

V and VDD = 2.5 V ±0.2 V) Applies to Military Temperature and MIL-STD-883B Temperature

Only.

2-38

v5.4

(October 2006)

A statement about single cell and cascaded cell timing diagrams was added to the "Enclosed

Timing Diagrams – FIFO Mode:" section.

2-65

The following pins were updated in the "144-FBGA Pin" table:

Pin Number Updated Function

I/O / GL1

I/O / GL2

3-38

v5.3

The heading, MIL-STD-883B, and note 4 were added to the "Device Resources" table.

iii

(May 2006)

The "Temperature Grade Offerings" table was updated to include the military (M) temperature

grade in the following device/packages:

APA300-FG144

APA300-FG256

APA600-FG256

APA600-FG484

APA600-FG676

APA1000-FG896

v5.2

90° and 270° phase shift support was removed from the datasheet.

N/A

(December 2005)

The "Ordering Information" section was updated to include RoHS information.

The last paragraph of the "Boundary Scan (JTAG)" section was updated.

2-8

The Output Frequency Range in the "Timing Control and Characteristics" section.

2-10

The title for Table 2-19 • Military Temperature Grade Product Performance Retention was

updated.

2-32

The caption was updated in Figure 2-45 • FIFO Reset.

2-72

APA150 Datasheet(PDF) 169 Page - Actel Corporation

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