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AD9642 Datasheet(PDF) 1 Page - Analog Devices |
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AD9642 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 5 page ![]() Circuit Note CN-0279 Circuits from the Lab™ reference circuits are engineered and tested for quick and easysystemintegrationto helpsolve today’s analog, mixed-signal, and RF design challenges. For more informationand/orsupport, visit www.analog.com/CN0279. Devices Connected/Referenced AD9642 14-Bit, 250 MSPS Analog-to-Digital Converter ADL5565 6 GHz Ultrahigh Dynamic Range Differential Amplifier High IF Sampling Receiver Front End with Band-Pass Filter Rev. 0 Circuitsfromthe Lab™circuitsfromAnalog Deviceshave been designedandbuiltbyAnalogDevices engineers. Standard engineering practices have been employed in the design and construction of eachcircuit,andtheirfunctionandperformancehavebeentestedandverifiedinalabenvironmentat room temperature. However, you are solely responsible for testing the circuit and determining its suitabilityandapplicabilityforyouruseandapplication.Accordingly,innoeventshallAnalogDevices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoeverconnectedtotheuseofanyCircuitsfromtheLabcircuits. (Continuedonlastpage) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved. EVALUATION AND DESIGN SUPPORT Design and Integration Files Schematics, Layout Files, Bill of Materials CIRCUIT FUNCTION AND BENEFITS The circuit, shown in Figure 1, is a narrow, band-pass receiver front end based on the ADL5565 ultralow noise differential amplifier driver and the AD9642 14-bit, 250 MSPS analog-to- digital converter (ADC). The third-order, Butterworth antialiasing filter is optimized based on the performance and interface requirements of the amplifier and ADC. The total insertion loss due to the filter network and other components is only 5.8 dB. The overall circuit has a bandwidth of 18 MHz with a pass-band flatness of 3 dB. The signal-to-noise ratio (SNR) and spurious- free dynamic range (SFDR) measured with a 127 MHz analog input are 71.7 dBFS and 92 dBc, respectively. The sampling frequency is 205 MSPS, thereby positioning the IF input signal in the second Nyquist zone between 102.5 MHz and 205 MHz. CIRCUIT DESCRIPTION The circuit accepts a single-ended input and converts it to differential input using a wide bandwidth (3 GHz) Mini-Circuits TC2-1T 1:2 transformer. The 6 GHz ADL5565 differential amplifier has a differential input impedance of 200 Ω when operating at a gain of 6 dB, and 100 Ω when operating at a gain of 12 dB. A gain option of 15.5 dB is also available. The ADL5565 is an ideal driver for the AD9642, and the fully differential architecture through the band-pass filter and into the ADC provides good high frequency common-mode rejection, as well as minimizes second-order distortion products. The ADL5565 provides a gain of 6 dB or 12 dB, depending on the input connection. In the circuit, a gain of 12 dB was used to compensate for the insertion loss of the filter network and transformer (approximately 5.8 dB), providing an overall signal gain of 5.5 dB. Figure 1. 14-Bit, 250 MSPS Wideband Receiver Front End (Simplified Schematic: All Connections and Decoupling Not Shown) Gains, Losses, and Signal Levels Measured Values for an Input Frequency of 127 MHz 0.1µF 0.1µF 0.1µF 33pF 36nH 0.1µF ADL5565 G = 12dB 2.5pF XFMR 1:2 Z TC2-1T INPUT Z = 50Ω ZI = 100Ω INTERNAL INPUT Z AD9642 14-BIT 205MSPS ADC 620nH 5Ω 5Ω 187Ω 40Ω 217Ω +3.3V +1.8V DRVDD +1.8V AVDD 5.6dB LOSS 0.2dB LOSS 5.8dB LOSS 11.8dB GAIN FS = 1.75V p-p DIFF 620nH 0.5dB LOSS ANALOG INPUT +1.5dBm FS AT 127MHz OVERALL GAIN = 5.5dB 100Ω 100Ω 0.1µF 5Ω 5Ω 15Ω 15Ω 2.85kΩ 1.2pF 1.2pF 33pF VCM 36nH VIP2 VIN2 VIP1 VIN1 |
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