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AP1601 Datasheet(PDF) 2 Page - Asahi Kasei Microsystems |
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AP1601 Datasheet(HTML) 2 Page - Asahi Kasei Microsystems |
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2 / 22 page ![]() [AP1601] MS 1454-E-01 2 2012/08 BLOCK DIAGRAM Depletion MOSFET HV VDD BLEED 5V Regulator SWVDD UVLO BLEEDER OVP RESET Driver TSD OCP x5 S HOLD CLK ZCD LD VFC OSC PW M GND CS OUT REF 2.5V 1.2V LEB SEL - - + R Q S R Q Driver 2.8uA 2uA 100kΩ 2MΩ Figure 1. AP1601 Block diagram Block Description BLEEDER By monitoring the BLEED pin voltage and SWVDD condition, a bleed from HV pin or VDD charge ON/OFF is controlled. 5V Regulator 5V for internal circuits is generated from VDD pin. SWVDD By monitoring VDD pin voltage and if VDD voltage is deficient, a signal to BLEEDER is output. RESET By monitoring 5V regulator startup condition, malfunction of internal circuits using 5V is prevented. UVLO By monitoring VDD pin voltage, Driver output is held to GND level and 5V regulator is inactivated so that malfunction at low voltage is prevented. OVP Over voltage detection circuit on VDD pin. Driver Driver for external N type MOSFET. TSD Overheat detection circuit. OCP Over current detection circuit for external MOSFET. CLK Internal clock / Off-time generation circuit. ZCD Bottom voltage detection circuit. HOLD By sampling the auxiliary winding voltage, which is proportional to the Vf of the LEDs, a internal voltage is generated, which compensates for the CLK frequency on DCM or the off-time on CCM. LEB Leading edge blank circuit |
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