AD9786BSVRL datasheet(37/56 Pages) AD

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AD9786

Rev. B | Page 37 of 56

–8

–6

–4

–2

–150

–100

–50

×2 INTERPOLATION

×4 INTERPOLATION

×8 INTERPOLATION

fSIN

–8

–6

–4

–2

–150

–100

–50

fSIN

–8

–6

–4

–2

–150

–100

–50

fSIN

INTERP[1] = 0

INTERP[0] = 1

MOD[1] = 0

MOD[0] = 1

INTERP[1] = 1

INTERP[0] = 0

MOD[1] = 0

MOD[0] = 1

INTERP[1] = 1

INTERP[0] = 1

MOD[1] = 0

MOD[0] = 1

Figure 64. Complex Modulation by fDAC/2 Under All Interpolation Modes

–8

–6

–4

–2

–150

–100

–50

×2 INTERPOLATION

×4 INTERPOLATION

×8 INTERPOLATION

fSIN

INTERP[1] = 0

INTERP[0] = 1

MOD[1] = 1

MOD[0] = 0

–8

–6

–4

–2

–150

–100

–50

fSIN

INTERP[1] = 1

INTERP[0] = 0

MOD[1] = 1

MOD[0] = 0

–8

–6

–4

–2

–150

–100

–50

fSIN

INTERP[1] = 1

INTERP[0] = 1

MOD[1] = 1

MOD[0] = 0

Figure 65. Complex Modulation by fDAC/4 Under All Interpolation Modes

–8

–6

–4

–2

–150

–100

–50

×2 INTERPOLATION

×4 INTERPOLATION

×8 INTERPOLATION

fSIN

INTERP[1] = 0

INTERP[0] = 1

MOD[1] = 1

MOD[0] = 1

–8

–6

–4

–2

–150

–100

–50

fSIN

INTERP[1] = 1

INTERP[0] = 0

MOD[1] = 1

MOD[0] = 1

–8

–6

–4

–2

–150

–100

–50

fSIN

INTERP[1] = 1

INTERP[0] = 1

MOD[1] = 1

MOD[0] = 1

Figure 66. Complex Modulation by fDAC/8 Under All Interpolation Modes

AD9786BSVRL Datasheet(PDF) 37 Page - Analog Devices

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