AD5040 datasheet(19/24 Pages) AD

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AD5512A/AD5542A

Rev. A | Page 19 of 24

LAYOUT GUIDELINES

In any circuit where accuracy is important, careful consider-

ation of the power supply and ground return layout helps to

ensure the rated performance. Design the printed circuit board

(PCB) on which the AD5512A/AD5542A is mounted so that

the analog and digital sections are separated and confined to

certain areas of the board. If the AD5512A/AD5542A are in a

system where multiple devices require an analog ground-to-

digital ground connection, make the connection at one point

only. Establish the star ground point as close as possible to the

device.

The AD5512A/AD5542A should have ample supply bypassing

of 10 μF in parallel with 0.1 μF on each supply located as close

to the package as possible, ideally right up against the device.

The 10 μF capacitors are the tantalum bead type. The 0.1 μF

capacitor should have low effective series resistance (ESR)

and low effective series inductance (ESI), such as the common

ceramic types, which provide a low impedance path to ground

at high frequencies to handle transient currents due to internal

logic switching.

GALVANICALLY ISOLATED INTERFACE

In many process control applications, it is necessary to provide

an isolation barrier between the controller and the unit being

controlled to protect and isolate the controlling circuitry

from any hazardous common-mode voltages that may occur.

Coupler® products from Analog Devices provide voltage

isolation in excess of 2.5 kV. The serial loading structure

of the AD5512A/AD5542A makes the parts ideal for isolated

interfaces because the number of interface lines is kept to a

minimum. Figure 38 shows a 4-channel isolated interface to

the AD5512A/AD5542A using an ADuM1400. For further

information, visit http://www.analog.com/icouplers.

ENCODE

SERIAL

CLOCK IN

CONTROLLER

ADuM14001

SERIAL

DATA OUT

SYNC OUT

LOAD DAC

OUT

DECODE

SCLK

DIN

LDAC

VIA

VOA

ENCODE

DECODE

VIB

VOB

ENCODE

DECODE

VIC

VOC

ENCODE

DECODE

VID

VOD

1ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 38. Isolated Interface

DECODING MULTIPLE DACS

The CS pin of the AD5512A/AD5542A can be used to select

one of a number of DACs. All devices receive the same serial

clock and serial data, but only one device receives the CS signal

at any one time. The DAC addressed is determined by the

decoder. There is some digital feedthrough from the digital

input lines. Using a burst clock minimizes the effects of digital

feedthrough on the analog signal channels. Figure 39 shows a

typical circuit.

AD5512A/

AD5542A

DIN

SCLK

VOUT

AD5512A/

AD5542A

DIN

SCLK

VOUT

AD5512A/

AD5542A

DIN

SCLK

VOUT

AD5512A/

AD5542A

DIN

SCLK

VOUT

VDD

DGND

CODED

ADDRESS

SCLK

DIN

ENABLE

DECODER

Figure 39. Addressing Multiple DACs

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