| Electronic Components Datasheet Search |
|
LTC2970CUFD Datasheet(PDF) 18 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LTC2970CUFD Datasheet(HTML) 18 Page - Linear Technology |
|
18 / 36 page ![]() LTC2970/LTC2970-1 18 29701fc ADC_MON: ADC Monitoring Mux Control Register – Read/Write BIT(s) SYMBOL OPERATION b[0] b[1] b[2] b[3] b[4] b[5] b[6] Adc_mon_vdd Adc_mon_v12 Adc_mon_ch0_a Adc_mon_ch0_b Adc_mon_ch1_a Adc_mon_ch1_b Adc_mon_temp 0 = ADC will not convert associated channel. (Default) 1 = ADC will continuously convert associated channel. b[15:7] Reserved Always Returns 0 SYNC: Tracking Synchronization Control Register – Read/Write LTC2970-1 Only BIT(s) SYMBOL OPERATION b[0] Sync_track Write 0 = Do not synchronize. 1 = Synchronize all tracking enabled registers to the same starting point. Read 0 = The LTC2970-1 is not synchronized for tracking (default). 1 = The LTC2970-1 is synchronized for tracking. Use of the global address will allow the synchronization status of multiple LTC2970-1s to be verified in a single read; since a one can only be returned if all LTC2970-1s are synchronized. The IO_track_start command may then be issued with the same global address to begin synchronized tracking across multiple ICs. b[15:1] Reserved Always Returns 0 OPERATIO VDD_ADC, V12_ADC, CH0_A_ADC, CH0_B_ADC, CH1_A_ADC, CH1_B_ADC, and TEMP_ADC: ADC Conversion Result Registers – Read Only Unless Specified Otherwise BIT(s) SYMBOL OPERATION b[14:0] Vdd_adc[14:0] V12_adc[14:0] Ch0_a_adc[14:0] Ch0_b_adc[14:0] Ch1_a_adc[14:0] Ch1_b_adc[14:0] Temp_adc[14:0] Measured data from ADC conversion. 'h4000 corresponds to negative full- scale input voltage. 'h0000 corresponds to 0V. 'h3fff corresponds to full-scale input voltage. 2’s complement format, b[14] = sign. Read/Write when Io_i2c_adc_wen = 1. Default value is undefined. b[15] Vdd_adc_new V12_adc_new Ch0_a_adc_new Ch0_b_adc_new Ch1_a_adc_new Ch1_b_adc_new Temp_adc_new 1 = The ADC has updated the associated result register since the last time the data was read. 0 = Previously read data. (Default) VDD_OV, V12_OV, CH0_A_OV, CH0_B_OV, CH1_A_OV, CH1_B_ OV: Over Voltage Limit Registers – Read/Write BIT(s) SYMBOL OPERATION b[14:0] Vdd_ov[14:0] V12_ov[14:0] Ch0_a_ov[14:0] Ch0_b_ov[14:0] Ch1_a_ov[14:0] Ch1_b_ov[14:0] ADC over-voltage threshold limit. The associated instantaneous over voltage fault is asserted if the channel’s ADC result is greater than this limit. Code 'h3fff disables OV threshold detect feature for that channel. 2’s complement format, b[14] = sign. Default value is undefined. b[15] Reserved Always Returns 0 VDD_UV, V12_UV, CH0_A_UV, CH0_B_UV, CH1_A_UV, CH1_B_ UV: Under Voltage Limit Registers – Read/Write BIT(s) SYMBOL OPERATION b[14:0] Vdd_uv[14:0] V12_uv[14:0] Ch0_a_uv[14:0] Ch0_b_uv[14:0] Ch1_a_uv[14:0] Ch1_b_uv[14:0] ADC under-voltage threshold limit. The associated instantaneous under voltage fault is asserted if the channel’s ADC result is greater than this limit. Code 'h4000 disables UV threshold detect feature for that channel. 2’s complement format, b[14] = sign. Default value is undefined. b[15] Reserved Always Returns 0 4. Detailed I2C Command Register Descriptions (Cont.) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |