LTC2970CUFD datasheet(26/36 Pages) LINER

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LTC2970/LTC2970-1

29701fc

OPERATIO

Procedure:

Update the over-voltage limit register with the value above

which the ADC result should generate an over-voltage fault.

Instantaneous over-voltage faults are updated after each

ADC conversion. They are asserted high when the ADC

result is greater than the over-voltage limit. They are cleared

if the ADC result is less than or equal to the over-voltage

limit. Setting the over-voltage limit to 14’h3fff inhibits

instantaneous faults for the associated channel.

Update the under-voltage limit register with the value below

which the ADC result should generate an under-voltage

fault. Instantaneous under-voltage faults are updated

after each ADC conversion. They are asserted high when

the ADC result is less than the under-voltage limit. They

are cleared if the ADC result is greater than or equal to

the under-voltage limit. Setting the over-voltage limit to

14’h4000 inhibits instantaneous faults for the associated

channel.

Update ADC_MON() control bits to allow ADC conversions

on all channels that are to be monitored for over and under

voltage limits. Instantaneous IDAC faults are polled after

all ADC conversions are completed and set when the as-

sociated IDAC registers are at ‘h00 of ‘hff.

Read FAULT() to view the value of all instantaneous

faults.

The IO(Io_cfg_0) command may be used to conﬁgure

the GPIO_0 pin to output the internal Power_good ﬂag.

Power_good is asserted high if there are no instantaneous

over-voltage or under-voltage faults. IO() may be used to

read the value of Power_good through io_gpio_0.

The IO(Io_cfg_1) command may be used to conﬁgure the

GPIO_1 pin to output the internal Idac_fault ﬂag. Idac_fault

is asserted high if either IDAC value is faulted. IO() may be

used to read the value of Idac_fault through io_gpio_1.

Rules:

The over-voltage and under-voltage limits must be initial-

ized; they do not have a default value.

All over-voltage limits, under-voltage limits and ADC re-

sults use 2’s complement notation with bit position [14]

of register [14:0] being used for the sign.

Instantaneous Ch0_a and Ch1_a faults may be used to

trigger a servo on fault event.

Over-voltage and under-voltage faults require that the

associated ADC_MON control bit be asserted high for

instantaneous fault detection to be updated.

17. Generating and Monitoring Latched Faults

The LTC2970 is able to selectively latch instantaneous faults

in the latched fault register FAULT_LA. Each instantaneous

fault has an associated latched fault bit in FAULT_LA and

a fault enable bit in FAULT_EN; (see Table 8) for details.

When an instantaneous fault enable bit is high, any event

that sets the instantaneous fault will simultaneously set

the latched fault. The latched fault will remain set even if

conditions permit the instantaneous fault to be cleared.

The latched faults are immediately cleared whenever the

associated fault enable bit is cleared. All latched faults are

also cleared when the latched fault register is read over

FAULT_LA().

The FAULT_INDEX() command may be read to determine

if any latched faults are asserted. Reading FAULT_INDEX()

does not clear latched faults. The ALERT output may also

be conﬁgured to view whether any latched faults are as-

serted.

Procedure:

Follow procedure for generating instantaneous faults.

Write FAULT_EN() to enable any combination of latched

faults.

Read FAULT_INDEX() to determine if any latched faults

are asserted without clearing latched faults.

Read FAULT_LA() to monitor all latched faults. Reading

FAULT_LA() will clear all latched faults. These will remain

clear until the next time the LTC2970 polls and sets an

associated instantaneous fault.

Setting IO(Io_alert_enb) low will cause ALERT to be as-

serted low whenever any one of the fourteen latched faults

is asserted high. The value of the ALERT pin may also be

read through IO(Alertb).

LTC2970CUFD Datasheet(PDF) 26 Page - Linear Technology

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