LMV712TL datasheet(11/22 Pages) TI

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CLASS AB

CONTROL

BIAS

CONTROL

MP3

MP4

MP1

MP2

MN2

MN4

MN3

MN1

OUT

VBIAS

LMV712-N

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SNOS534G – MAY 2004 – REVISED MARCH 2010

APPLICATION INFORMATION

THEORY OF OPERATION

The LMV712-N dual op amp is derived from the LMV711 single op amp. Figure 32 contains a simplified

schematic of one channel of the LMV712-N.

Figure 32.

Rail-to-Rail input is achieved by using in parallel, one NMOS differential pair (MN1 and MN2) and one PMOS

differential pair (MP1 and MP2). When the common mode input voltage (VCM) is near V

+, the NMOS pair is on

and the PMOS pair is off. When VCM is near V

−, the NMOS pair is off and the PMOS pair is on. When V

CM is

between V+ and V−, internal logic decides how much current each differential pair will get. This special logic

ensures stable and low distortion amplifier operation within the entire common mode voltage range.

Because both input stages have their own offset voltage (VOS) characteristic, the offset voltage of the LMV712-N

becomes a function of VCM. VOS has a crossover point at 1.4V above V

−. Refer to the "V

OS vs. VCM" curve in the

Typical Performance Characteristics section. Caution should be taken in situations where input signal amplitude

is comparable to VOS value and/or the design requires high accuracy. In these situations, it is necessary for the

input signal to avoid the crossover point.

The current coming out of the input differential pairs gets mirrored through two folded cascode stages (Q1, Q2,

Q3, Q4) into the "class AB control" block. This circuitry generates voltage gain, defines the op amp's dominant

pole and limits the maximum current flowing at the output stage. MN3 introduces a voltage level shift and acts as

a high impedance to low impedance buffer.

The output stage is composed of a PMOS and a NPN transistor in a common source/emitter configuration,

delivering a rail-to-rail output excursion.

The MN4 transistor ensures that the LMV712-N output remains near V− when the amplifier is in shutdown mode.

SHUTDOWN PIN

The LMV712-N offers independent shutdown pins for the dual amplifiers. When the shutdown pin is tied low, the

respective amplifier shuts down and the supply current is reduced to less than 1µA. In shutdown mode, the

amplifier's output level stays at V−. In a 2.7V operation, when a voltage between 1.5V to 2.7V is applied to the

shutdown pin, the amplifier is enabled. As the amplifier is coming out of the shutdown mode, the output

waveform ramps up without any glitch. This is demonstrated in Figure 33.

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