PCM1750P datasheet(15/21 Pages) TI

15 / 21 page

PCM1750

The PCM1750 is sensitive to supply voltages outside the

absolute maximum ratings shown in the specification tables.

Do not exceed –8V on the negative supplies at any time or

irreversible damage may occur. Note the 10

Ω resistors in

series with each –5V supply line (shown in Figure–7) to help

protect the part from severe damage if the supplies are over-

ranged momentarily.

Grounding Requirements

Because of the high resolution and linearity of the PCM1750,

system design problems such as ground path resistance and

contact resistance become very important.

The ACOM and DCOM pins are separated internally on the

PCM1750. To eliminate unwanted ground loops, all com-

mons (both analog and digital) should be connected to the

same low-impedance ground plane. This should be an ana-

log ground plane separate from other high-frequency digital

ground planes on the same board. If the analog and digital

commons of the PCM1750 are connected to different ground

planes, care should be taken to keep them within 0.6V of

each other to insure proper operation of the converter.

A ground plane is usually the best solution for preserving

dynamic performance and reducing noise coupling into

sensitive converter circuits. Where any compromises must

be made, the common return of the analog input signals

should be referenced to the ACOM pins. This will prevent

voltage drops in the power supply returns from appearing in

series with the input signal.

Coupling between analog input and digital lines should be

minimized by careful layout. For instance, if the lines must

cross, they should do so at right angles. Parallel analog and

digital lines should be separated from each other by a pattern

connected to common.

If external MSB and offset adjust potentiometers are used,

the potentiometers and related resistors should be located as

close to the PCM1750 as possible.

Minimizing “Glitches”

Coupling of external transients into an analog-to-digital

converter can cause errors which are difficult to debug. Care

should be taken to avoid glitches during critical times in the

sampling and conversion process. Since the PCM1750 has

an internal sample/hold function, the signal that switches it

into the HOLD state (CONVERT going HIGH) is critical, as

it would be on any sample/hold amplifier. The CONVERT

rising edge should have minimal ringing, especially during

the 20ns after it rises.

APPLICATIONS

USING A DIGITAL FILTER

A 4x decimation filter is available for the PCM1750 called

the DF1750. It is available in a 28-pin DIP or a 40-pin SOIC

package. The use of this filter greatly eases the implementa-

tion of the PCM1750 in audio band applications.

10µF

1/2 5532

10µF

1/2 5532

VREF

INL

VREF

INR

MC1403

+5V

2.5V

VREF

OUTL

VREF

OUTR

1µF

2.75V

1µF

909

Ω

909

Ω

10k

Ω

10k

Ω

0.1µF

26.36k

Ω

1/2 5532

10k

Ω

REF102

+15

10µF

VREF

INL

VREF

INR

VREF

OUTL

VREF

OUTR

1µF

2.75V

10V

1µF

FIGURE 8b. External Reference Circuit Using Standard

2.5V Reference.

FIGURE 8c. Low Noise, Low Drift External Reference

Circuit.

PCM1750P Datasheet(PDF) 15 Page - Texas Instruments

PCM1750P Datasheet(HTML) 15 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Datasheet Download

Link URL