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74HC595DB Datasheet(PDF) 14 Page - NXP Semiconductors |
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74HC595DB Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 24 page ![]() 74HC_HCT595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 12 December 2011 14 of 24 NXP Semiconductors 74HC595; 74HCT595 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 12. Master reset to output propagation delays mna561 MR input SHCP input Q 7S output tPHL tW trec VM VOH VOL VI GND VI GND VM VM Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 13. Enable and disable times msa697 tPLZ tPHZ outputs disabled outputs enabled 90 % 10 % outputs enabled OE input VM tPZL tPZH VM VM Qn output LOW-to-OFF OFF-to-LOW Qn output HIGH-to-OFF OFF-to-HIGH tr tf 90 % 10 % Table 8. Measurement points Type Input Output VM VM 74HC595 0.5VCC 0.5VCC 74HCT595 1.3 V 1.3 V |
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