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LPC2142 Datasheet(PDF) 32 Page - NXP Semiconductors

Part # LPC2142
Description  Single-chip 16-bit/32-bit ocontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
PDF  45 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC2142 Datasheet(HTML) 32 Page - NXP Semiconductors

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LPC2141_42_44_46_48
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 12 August 2011
32 of 45
NXP Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
10. ADC electrical characteristics
[1]
The ADC is monotonic, there are no missing codes.
[2]
The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 8.
[3]
The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 8.
[4]
The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 8.
[5]
The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 8.
[6]
The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See Figure 8.
[7]
See Figure 9.
Table 8.
ADC static characteristics
VDDA = 2.5 V to 3.6 V; Tamb = 40 C to +85 C unless otherwise specified; ADC frequency 4.5 MHz.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIA
analog input voltage
0
-
VDDA
V
Cia
analog input capacitance
-
-
1
pF
ED
differential linearity error
VSSA =0 V, VDDA =3.3 V
[1][2] --
1LSB
EL(adj)
integral non-linearity
VSSA =0 V, VDDA =3.3 V
[3] --
2LSB
EO
offset error
VSSA =0 V, VDDA =3.3 V
[4] --
3LSB
EG
gain error
VSSA =0 V, VDDA =3.3 V
[5] --
0.5
%
ET
absolute error
VSSA =0 V, VDDA =3.3 V
[6] --
4LSB
Rvsi
voltage source interface
resistance
[7] --
40
k



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