FXLC95000CL datasheet(14/38 Pages) FREESCALE

14 / 38 page

• It is highly desirable to physically separate analog components from noisy digital

components by ground planes. Do not place an analog trace in parallel with digital

traces. It is also desirable to place an analog ground trace around an analog signal

trace to isolate it from digital traces.

• If in-circuit debug capability is desired, provide an interface to the BKGD/MS pin.

• Select resistors R2 and R3 in Figure 3 to match requirements stated in the I2C

standard. An example value of 4.7k

Ω is appropriate for the configuration shown.

• Use the PCB footprint, solder mask, and solder stencil shown in Footprint and

pattern information.

4.3.3 I2C reset considerations

If there is a reset during a slave I2C read transaction, then the slave device state machine

will hang the bus, because it is waiting for the master clock. The host-driven reset signal

provides an external way to reset the I2C state machine.

4.3.4 FXLC95000CL as an intelligent slave

I2C pullup resistors, a ferrite bead, and a few bypass capacitors are all that are required

to attach this device to a host platform. The basic configuration of the I2C interface is

shown in Figure 3.

The voltage level on pin 23 (RGPIO8) selects the slave-port format: I2C or SPI. The

RGPIO pins can also be programmed to generate interrupts to the host platform, in

response to the occurrence of application events. In this case, the pins should be routed

to the external interrupt pins of the host processor.

General Description

Xtrinsic FXLC95000CL Intelligent, Motion-Sensing Platform, Rev1.2, 8/2013.

Freescale Semiconductor, Inc.

FXLC95000CL Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc